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FT51BQ-R 参数 Datasheet PDF下载

FT51BQ-R图片预览
型号: FT51BQ-R
PDF下载: 下载PDF文件 查看货源
内容描述: [Advanced Microcontroller with 8051 Compatible Core]
分类和应用: 微控制器
文件页数/大小: 43 页 / 1683 K
品牌: FTDI [ FUTURE TECHNOLOGY DEVICES INTERNATIONAL LTD. ]
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FT51A Advanced MCU with 8051 Compatible Core IC Datasheet  
Version 1.5  
Document No.: FT_000877  
Clearance No.: FTDI#420  
Register  
Address  
Register Name  
Description  
IO DMA Current Byte Count Register  
(Upper Bits)  
(0xDD)  
DMA_CURR_CNT_U_3  
(0xDE)  
(0xDF)  
(0xE0)  
(0xE1)  
DMA_FIFO_DATA_3  
DMA_AFULL_TRIGGER_3  
DMA_CONTROL_4  
DMA_ENABLE_4  
IO DMA FIFO DATA  
IO DMA Almost Full Flag Trigger Value  
DMA Control Register  
IO DMA Enable Register  
DMA IO Interrupt Enable & Control  
Register  
DMA IO Interrupt Register  
DMA IO Source Mem Addr Register  
(Lower Bits)  
(0xE2)  
(0xE3)  
(0xE4)  
DMA_IRQ_ENA_4  
DMA_IRQ_4  
DMA_SRC_MEM_ADDR_L_4  
DMA IO Source Mem Addr Register  
(Upper Bits)  
DMA IO Destination Mem Addr Register  
(Lower Bits)  
DMA IO Destination Mem Addr Register  
(Upper Bits)  
(0xE5)  
(0xE6)  
(0xE7)  
DMA_SRC_MEM_ADDR_U_4  
DMA_DEST_MEM_ADDR_L_4  
DMA_DEST_MEM_ADDR_U_4  
(0xE8)  
(0xE9)  
DMA_IO_ADDR_L_4  
DMA_IO_ADDR_U_4  
DMA IO Addr Register (Lower Bits)  
IO DMA IO Addr Register (Upper Bits)  
IO DMA Transfer Byte Count Register  
(Lower Bits)  
IO DMA Transfer Byte Count Register  
(Upper Bits)  
IO DMA Current Byte Count Register  
(Lower Bits)  
IO DMA Current Byte Count Register  
(Upper Bits)  
(0xEA)  
(0xEB)  
(0xEC)  
(0xED)  
DMA_TRANS_CNT_L_4  
DMA_TRANS_CNT_U_4  
DMA_CURR_CNT_L_4  
DMA_CURR_CNT_U_4  
(0xEE)  
(0xEF)  
(0x100)  
(0x101)  
DMA_FIFO_DATA_4  
DMA_AFULL_TRIGGER_4  
AIO_CONTROL  
IO DMA FIFO DATA  
IO DMA Almost Full Flag Trigger Value  
AIO Control Register  
AIO_GLOBAL_CTRL  
AIO Global Control Register  
(0x102)  
to  
AIO _MODE_0  
to  
Mode Select for AIO pins 0-15.  
(0x105)  
AIO _MODE_3  
(0x108)  
(0x109)  
(0x10A)  
AIO_SAMPLE_0  
AIO_SAMPLE_1  
Initiates a SAMPLE of AIO 0 to 7  
Initiates a SAMPLE of AIO 8 to 15  
Selects the AIOs to be included in a  
Global function  
Selects the AIOs to be included in a  
Global function  
(0x10B)  
(0x10C)  
AIO_GLOBAL_PORT_SELECT_0_7  
AIO_GLOBAL_PORT_SELECT_8_15  
(0x13E)  
to  
AIO_0_ADC_DATA_L  
to  
Sampled ADC data for AIO0 to AIO15  
(0x15D)  
AIO_15_ADC_DATA_U  
(0x16E)  
(0x16F)  
(0x170)  
(0x171)  
AIO_INTERRUPT_0_7  
AIO_INT_ENABLE_0_7  
AIO_INTERRUPT_8_15  
AIO_INT_ENABLE_8_15  
Interrupt status for ports 0-7  
Interrupt enable for ports 0-7  
Interrupt status for ports 8-15  
Interrupt enable for ports 8-15  
Sample&Hold Settling time counter,  
lower 8 bits  
(0x176)  
AIO_SH_COUNTER_L  
Sample&Hold Settling time, upper 2  
bits  
Clock Divider  
(0x177)  
(0x17A)  
AIO_SH_COUNTER_U  
AIO_CLOCK_DIVIDER  
Table 0-1 IO Registers  
Copyright © Future Technology Devices International Limited  
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