FT240X USB 8-BIT FIFO IC Datasheet
Version 1.3
Document No.: FT_000626 Clearance No.: FTDI# 259
Appendix B - List of Figures and Tables
List of Figures
Figure 2.1 FT240X Block Diagram ...................................................................................................4
Figure 3.1 SSOP Package Pin Out and Schematic Symbol...................................................................7
Figure 3.2 QFN-24 Package Pin Out and schematic symbol ................................................................9
Figure 3.3 FIFO Read Cycle.......................................................................................................... 12
Figure 3.4 FIFO Write Cycle ......................................................................................................... 13
Figure 6.1 Bus Powered Configuration ........................................................................................... 22
Figure 6.2 Self Powered Configuration........................................................................................... 23
Figure 6.3 illustrates a self powered design which has a +3.3V to +5.25V supply. .............................. 23
Figure 6.4 Bus Powered with Power Switching Configuration ............................................................ 24
Figure 7.1 USB to MCU FIFO Interface........................................................................................... 25
Figure 7.2 USB Battery Charging Detection (1 pin).......................................................................... 26
Figure 7.3 USB Battery Charging Detection (2 pin).......................................................................... 27
Figure 8.1: Simplified memory map for the FT-X ............................................................................ 30
Figure 9.1 SSOP-24 Package Dimensions....................................................................................... 31
Figure 9.2 SSOP-24 Package Markings .......................................................................................... 32
Figure 9.3 QFN-24 Package Dimensions......................................................................................... 33
Figure 9.4 QFN-24 Package Markings ............................................................................................ 34
Figure 9.5 FT240X Solder Reflow Profile......................................................................................... 35
List of Tables
Table 3.1 USB Interface Group .......................................................................................................7
Table 3.2 Power and Ground Group.................................................................................................7
Table 3.3 Miscellaneous Signal Group..............................................................................................8
Table 3.4 FIFO Interface Group (see note 2) ....................................................................................8
Table 3.5 USB Interface Group .......................................................................................................9
Table 3.6 Power and Ground Group.................................................................................................9
Table 3.7 Miscellaneous Signal Group............................................................................................ 10
Table 3.8 FIFO Interface Group (see note 2) .................................................................................. 10
Table 3.9 CBUS Configuration Control ........................................................................................... 11
Table 3.10 FIFO Read Cycle Timings ............................................................................................. 12
Table 3.11 FIFO Write Cycle......................................................................................................... 13
Table 5.1 Absolute Maximum Ratings............................................................................................ 16
Table 5.2 ESD and Latch-Up Specifications .................................................................................... 16
Table 5.3 Operating Voltage and Current ....................................................................................... 17
Table 5.4 FIFO I/O Pin Characteristics VCCIO = +3.3V, (except USB PHY pins) .................................. 18
Table 5.5 FIFO I/O Pin Characteristics VCCIO = +2.5V, (except USB PHY pins) .................................. 19
Table 5.6 FIFO I/O Pin Characteristics VCCIO = +1.8V (except USB PHY pins) ................................... 20
Table 5.7 USB I/O Pin (USBDP, USBDM) Characteristics .................................................................. 21
Table 5.8 MTP Memory Characteristics........................................................................................... 21
Table 5.9 Internal Clock Characteristics......................................................................................... 21
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