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FT230X 参数 Datasheet PDF下载

FT230X图片预览
型号: FT230X
PDF下载: 下载PDF文件 查看货源
内容描述: USB与优化的引脚数的串行UART接口,用于更小的PCB设计 [USB to serial UART interface with optimised pin count for smaller PCB designs]
分类和应用: PC
文件页数/大小: 44 页 / 816 K
品牌: FTDI [ FUTURE TECHNOLOGY DEVICES INTERNATIONAL LTD. ]
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FT230X USB TO BASIC UART IC
Document No.: FT_000566 Clearance No.: FTDI# 260
Version 1.2
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Function Description
The FT230X is a compact USB to a basic serial UART interface device which simplifies USB
implementations in a small optimised package, with minimum UART signals and reduces external
component count by fully integrating an MTP memory, and an integrated clock circuit which requires no
external crystal. It has been designed to operate efficiently with USB host controllers by using as little
bandwidth as possible when compared to the total USB bandwidth available.
4.1 Key Features
Functional Integration.
Fully integrated MTP memory, clock generation, AVCC filtering, Power-On-
Reset (POR) and LDO regulators.
Configurable CBUS I/O Pin Options.
The fully integrated MTP memory allows configuration of the
Control Bus (CBUS) functionality and drive strength selection. There are 4 configurable CBUS I/O pins.
These configurable options are detailed in section 3.3
The CBUS lines can be configured with any one of these output options by setting bits in the internal MTP
memory. The device is shipped with the most commonly used pin definitions pre-programmed - see
Section 8 for details.
Asynchronous Bit Bang Mode with RD# and WR# Strobes.
The FT230X supports FTDI’s previous
chip generation bit-bang mode. In bit-bang mode, the four UART lines can be switched from the regular
interface mode to a 4-bit general purpose I/O port. Data packets can be sent to the device and they will
be sequentially sent to the interface at a rate controlled by an internal timer (equivalent to the baud rate
pre-scalar). In the FT230X device this mode has been enhanced by outputting the internal RD# and WR#
strobes signals which can be used to allow external logic to be clocked by accesses to the bit-bang I/O
bus. This option will be described more fully in a separate application note available from FTDI website
Synchronous Bit Bang Mode.
The FT230X supports synchronous bit bang mode. This mode differs from
asynchronous bit bang mode in that the interface pins are only read when the device is written to. This
makes it easier for the controlling program to measure the response to an output stimulus as the data
returned is synchronous to the output data. An application note, AN232R-01, available from FTDI website
Source Power and Power Consumption.
The FT230X is capable of operating at a voltage supply
between +3.3V and +5.25V with a nominal operational mode current of 8mA and a nominal USB suspend
mode current of 125µA. This allows greater margin for peripheral designs to meet the USB suspend mode
current limit of 2.5mA. An integrated level converter within the UART interface allows the FT230X to
interface to UART logic running at +1.8V to +3.3V (5V tolerant).
4.2 Functional Block Descriptions
The following paragraphs detail each function within the FT230X. Please refer to the block diagram shown
in Figure 2.1
Internal MTP Memory.
The internal MTP memory in the FT230X is used to store USB Vendor ID (VID),
Product ID (PID), device serial number, product description string and various other USB configuration
descriptors. The internal MTP memory is also used to configure the CBUS pin functions. The FT230X is
supplied with the internal MTP memory pre-programmed as described in Section 8. A user area of the
internal MTP memory is available to system designers to allow storing additional data from the user
application over USB. The internal MTP memory descriptors can be programmed in circuit, over USB
without any additional voltage requirement. The descriptors can be programmed using the FTDI utility
software called FT_PROG, which can be downloaded from FTDI Utilities on the FTDI website
+3.3V LDO Regulator.
The +3.3V LDO regulator generates the +3.3V reference voltage for driving the
USB transceiver cell output buffers. It requires an external decoupling capacitor to be attached to the
3V3OUT regulator output pin. It also provides +3.3V power to the 1.5kΩ internal pull up resistor on
USBDP. The main function of the LDO is to power the USB Transceiver and the Reset Generator Cells
rather than to power external logic. However, it can be used to supply external circuitry requiring a
+3.3V nominal supply with a maximum current of 50mA.
+1.8V LDO Regulator.
The +1.8V LDO regulator generates the +1.8V reference voltage for internal use
driving the IC core functions of the serial interface engine and USB protocol engine.
Copyright © 2013 Future Technology Devices International Limited
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