Document No.: FT_000061
FT2232H DUAL HIGH SPEED USB TO MULTIPURPOSE UART/FIFO IC
Datasheet Version 2.09
Clearance No.: FTDI#77
4.4 FT245 Synchronous FIFO Interface Mode Description
When channel A is configured in an FT245 Synchronous FIFO interface mode the IO timing of the signals
used are shown in Figure 4.4, which shows details for read and write accesses. The timings are shown in
Table 4.1. Note that only a read or a write cycle can be performed at any one time. Data is read or
written on the rising edge of the CLKOUT clock.
Figure 4.4 FT245 Synchronous FIFO Interface Signal Waveforms
NAME
t1
t2
t3
t4
t5
t6
t7
t8
MIN
NOM
16.67
8.33
MAX Units
COMMENT
CLKOUT period
CLKOUT high period
CLKOUT low period
CLKOUT to RXF#
ns
ns
ns
7.5
7.5
1
1
1
1
11
0
1
11
0
8.33
7.15
7.15
7.15
7.15
ns
ns
ns
ns
ns
ns
ns
ns
ns
CLKOUT to read DATA valid
OE# to read DATA valid
CLKOUT to OE#
RD# setup time to CLKOUT (RD# low afterOE# low)
RD# hold time
CLKOUT TO TXE#
Write DATA setup time
Write DATA hold time
WR# setup time to CLKOUT (WR# low after TXE#
low)
t9
t10
t11
t12
7.15
t13
t14
11
0
ns
ns
WR# hold time
Table 4.1 FT245 Synchronous FIFO Interface Signal Timings
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