Document No.: FT_000589
FT313H USB2.0 HS Host Controller Datasheet Version 1.1
Clearance No.: FTDI# 318
Table 5-19 Data session length register......................................................................................... 33
Table 5-20 DMA configuration register........................................................................................... 35
Table 5-21 AUX Memory address register ...................................................................................... 35
Table 5-22 AUX data port register................................................................................................. 35
Table 5-23 Sleep timer register .................................................................................................... 35
Table 5-24 HC interrupt status register.......................................................................................... 37
Table 5-25 HC interrupt status register.......................................................................................... 38
Table 5-26 Test mode register...................................................................................................... 39
Table 5-28 Test parameter setting 2 register.................................................................................. 39
Table 6-1 Absolute Maximum Ratings........................................................................................... 40
Table 6-2 Operating Voltage and Current....................................................................................... 41
Table 6-3 Digital I/O Pin Characteristics (VCC(I/O) = +3.3V, Standard Drive Level)............................ 41
Table 6-4 Digital I/O Pin Characteristics (VCC(I/O) = +2.5V, Standard Drive Level)............................ 42
Table 6-5 Digital I/O Pin Characteristics (VCC(I/O) = +1.8V, Standard Drive Level)............................ 42
Table 6-6 USB I/O Pin (USBDP, USBDM) Characteristics .................................................................. 44
Table 6-7 5V Tolerant Pin (PSW_N, OC_N, VBUS) Characteristics...................................................... 44
Table 6-8 System clock characteristics .......................................................................................... 45
Table 6-9 Analog I/O pins characteristics....................................................................................... 45
Table 6-10 SRAM PIO timing ........................................................................................................ 46
Table 6-11 NOR PIO timing.......................................................................................................... 48
Table 6-12 General Multiplex PIO timing........................................................................................ 50
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