Features
The MPC885 block diagram is shown in Figure 1.
Instruction
Bus
8-Kbyte
Instruction Cache
System Interface Unit (SIU)
Unified
Bus
Memory Controller
Instruction MMU
32-Entry ITLB
Embedded
MPC8xx
Processor
Core
Internal
Bus Interface Bus Interface
Unit Unit
External
8-Kbyte
Data Cache
System Functions
Data MMU
32-Entry DTLB
Load/Store
Bus
PCMCIA-ATA Interface
Slave/Master IF
Security Engine
Fast Ethernet
Controller
Controller
Channel
AESU DEU MDEU
DMAs
DMAs
FIFOs
4
Interrupt
8-Kbyte
Parallel I/O
Timers Controllers Dual-Port RAM
10/100
BaseT
Media Access
Control
4 Baud Rate
Generators
32-Bit RISC Controller
and Program
Virtual IDMA
and
Serial DMAs
ROM
Parallel Interface Port
Timers
MIII/RMII
SCC4/
UTOPIA
I2C
USB
SCC2
SCC3
SMC1
SMC2
SPI
Time Slot Assigner
Serial Interface
Figure 1. MPC885 Block Diagram
MPC885/MPC880 Hardware Specifications, Rev. 3
Freescale Semiconductor
7
FREESCALE [ Freescale ]
