DC Characteristics
2 Maximum power dissipation at VDDL = VDDSYN= 1.9 V, and VDDH is at 3.5 V.
NOTE
The values in Table 5 represent V
-based power dissipation and do not
DDL
include I/O power dissipation over V
. I/O power dissipation varies
DDH
widely by application due to buffer current, depending on external
circuitry.
The V
power dissipation is negligible.
DDSYN
6 DC Characteristics
Table 6 provides the DC electrical characteristics for the MPC885/880.
Table 6. DC Electrical Specifications
Characteristic
Symbol
Min
Max
Unit
Operating voltage
V
DDL (Core)
1.7
3.135
1.7
1.9
3.465
1.9
V
V
VDDH (I/O)
1
VDDSYN
V
Difference
between
VDDL and
VDDSYN
—
100
mV
Input high voltage (all inputs except EXTAL and EXTCLK) 2
Input low voltage 3
VIH
VIL
2.0
3.465
0.8
V
V
V
GND
EXTAL, EXTCLK input high voltage
VIHC
0.7*(VDD
VDDH
)
H
Input leakage current, Vin = 5.5 V (except TMS, TRST, DSCK and
DSDI pins) for 5-V tolerant pins 2
Iin
IIn
IIn
—
—
—
100
10
µA
µA
µA
Input leakage current, Vin = VDDH (except TMS, TRST, DSCK, and
DSDI)
Input leakage current, Vin = 0 V (except TMS, TRST, DSCK and DSDI
pins)
10
Input capacitance 4
Cin
—
20
—
pF
V
Output high voltage, IOH = –2.0 mA,
except XTAL and open-drain pins
VOH
2.4
Output low voltage
VOL
—
0.5
V
IOL = 2.0 mA (CLKOUT)
IOL = 3.2 mA 5
IOL = 5.3 mA 6
IOL = 7.0 mA (TXD1/PA14, TXD2/PA12)
IOL = 8.9 mA (TS, TA, TEA, BI, BB, HRESET, SRESET)
1 The difference between VDDL and VDDSYN cannot be more than 100 mV.
2 The signals PA[0:15], PB[14:31], PC[4:15], PD[3:15], PE(14:31), TDI, TDO, TCK, TRST, TMS, MII1_TXEN, MII_MDIO
are 5-V tolerant. The minimum voltage is still 2.0 V.
3 VIL(max) for the I2C interface is 0.8 V rather than the 1.5 V as specified in the I2C standard.
MPC885/MPC880 Hardware Specifications, Rev. 3
Freescale Semiconductor
11
FREESCALE [ Freescale ]
