CPM Electrical Characteristics
TCK
J92
J93
J94
Output
Signals
Output
Signals
J95
J96
Output
Signals
Figure 40. Boundary Scan (JTAG) Timing Diagram
12 CPM Electrical Characteristics
This section provides the AC and DC electrical specifications for the communications processor module (CPM) of
the MPC885/880.
12.1 PIP/PIO AC Electrical Specifications
Table 16 provides the PIP/PIO AC timings as shown in Figure 41 to Figure 45.
Table 16. PIP/PIO Timing
All Frequencies
Num
Characteristic
Unit
Min
Max
21
22
23
24
25
26
27
28
29
30
31
Data-in setup time to STBI low
0
—
—
—
—
—
—
4.5
—
—
—
25
ns
clk
clk
ns
clk
clk
clk
clk
ns
ns
ns
Data-In hold time to STBI high
0
STBI pulse width
1.5
STBO pulse width
1 clk – 5 ns
Data-out setup time to STBO low
Data-out hold time from STBO high
STBI low to STBO low (Rx interlock)
STBI low to STBO high (Tx interlock)
Data-in setup time to clock high
Data-in hold time from clock high
Clock low to data-out valid (CPU writes data, control, or direction)
2
5
—
2
15
7.5
—
MPC885/MPC880 Hardware Specifications, Rev. 3
46
Freescale Semiconductor
FREESCALE [ Freescale ]
