High-Speed Serial Interfaces (HSSI)
2. Differential Output Voltage, V (or Differential Output Swing):
OD
The Differential Output Voltage (or Swing) of the transmitter, V , is defined as the difference of
OD
the two complimentary output voltages: V
or negative.
– V
The V value can be either positive
SDn_TX
SDn_TX. OD
3. Differential Input Voltage, V (or Differential Input Swing):
ID
The Differential Input Voltage (or Swing) of the receiver, V , is defined as the difference of the
ID
two complimentary input voltages: V
negative.
- V
The V value can be either positive or
SDn_RX
SDn_RX. ID
4. Differential Peak Voltage, V
DIFFp
The peak value of the differential transmitter output signal or the differential receiver input signal
is defined as Differential Peak Voltage, V = |A – B| Volts.
DIFFp
5. Differential Peak-to-Peak, V
DIFFp-p
Because the differential output signal of the transmitter and the differential input signal of the
receiver each range from A – B to –(A – B) Volts, the peak-to-peak value of the differential
transmitter output signal or the differential receiver input signal is defined as Differential
Peak-to-Peak Voltage, V
= 2*V
= 2 * |(A – B)| Volts, which is twice of differential
DIFFp-p
DIFFp
swing in amplitude, or twice of the differential peak. For example, the output differential peak-peak
voltage can also be calculated as V
= 2*|V |.
TX-DIFFp-p
OD
6. Differential Waveform
1. The differential waveform is constructed by subtracting the inverting signal (SDn_TX, for
example) from the non-inverting signal (SDn_TX, for example) within a differential pair. There is
only one signal trace curve in a differential waveform. The voltage represented in the differential
waveform is not referenced to ground. Refer to Figure 52 as an example for differential waveform.
2. Common Mode Voltage, V
cm
The Common Mode Voltage is equal to one half of the sum of the voltages between each conductor
of a balanced interchange circuit and ground. In this example, for SerDes output, V
=
cm_out
(V
+ V
)/2 = (A + B) / 2, which is the arithmetic mean of the two complimentary
SDn_TX
SDn_TX
output voltages within a differential pair. In a system, the common mode voltage may often differ
from one component’s output to the other’s input. Sometimes, it may be even different between the
receiver input and driver output circuits within the same component. It is also referred as the DC
offset in some occasion.
MPC8572E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 4
72
Freescale Semiconductor
FREESCALE [ Freescale ]
