Document Revision History
Table 87 explains line four of Figure 67.
Table 87. Meaning of Last Line of Part Marking
Digit
Description
A
Assembly Site
E Oak Hill
Q KLM
WL
YY
Lot number
Year assembled
WW
Work week assembled
23 Document Revision History
Table 88 provides a revision history for the MPC8572E hardware specification.
Table 88. Document Revision History
Rev.
Number
Date
Substantive Change(s)
4
06/2010
• In Section 18.3, “Pinout Listings,” updated Table 75 showing GPINOUT power rail as BVDD.
• Updated Section 14.1, “GPIO DC Electrical Characteristics.”
3
2
03/2010
06/2009
• In Section 2.1, “Overall DC Electrical Characteristics,” changed GPIO power from OVDD to BVDD.
• In Section 22.1, “Part Numbers Fully Addressed by this Document,” added Table 85 for Rev 2.1
silicon.
• In Section 22.1, “Part Numbers Fully Addressed by this Document,” updated Table 86 for Rev 1.1.1
silicon.
• In Section 3, “Power Characteristics,” updated CCB Max to 533MHz for 1200MHz core device in
Table 4, “MPC8572E Power Dissipation.”
• In Section 4.4, “DDR Clock Timing,” changed DDRCLK Max to 100MHz. This change was
announced in Product Bulletin #13572.
• Clarified restrictions in Section 4.5, “Platform to eTSEC FIFO Restrictions.”
• In Table 8, “RESET Initialization Timing Specifications,” added note 2.
• Added Section 14, “GPIO.”
• In Section 18.1, “Package Parameters for the MPC8572E FC-PBGA,” updated material composition
to 63% Sn, 37% Pb.
• In Section 18.2, “Mechanical Dimensions of the MPC8572E FC-PBGA, updated Figure 61 to
correct the package thickness and top view.
• In Section 19.1, “Clock Ranges,” updated CCB Max to 533MHz for 1200MHz core device in
Table 76, “MPC8572E Processor Core Clocking Specifications.”
• In Section 19.5.2, “Minimum Platform Frequency Requirements for High-Speed Interfaces,”
changed minimum CCB clock frequency for proper PCI Express operation.
• Added LPBSE to description of LGPL4/LGTA/LUPWAIT/LPBSE/LFRB signal in Table 75,
“MPC8572E Pinout Listing.”
• Corrected supply voltage for GPIO pins in Table 75, “MPC8572E Pinout Listing.”
• Applied note to SD1_PLL_TPA in Table 75, “MPC8572E Pinout Listing.”
• Updated note regarding MDIC in Table 75, “MPC8572E Pinout Listing.”
• Added note for LAD pins in Table 75, “MPC8572E Pinout Listing.”
• Updated Table 86, “,Part Numbering Nomenclature - Rev 1.1.1” with Rev 2.0 and Rev 2.1 part
number information. Added note indicating that silicon version 2.0 is available for prototype
purposes only and will not be available as a qualified device.
MPC8572E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 4
Freescale Semiconductor
137
FREESCALE [ Freescale ]
