Document Revision History
22.2 Part Marking
Parts are marked as in the example shown in Figure 45.
MPCnnnnetppaaar
core/platform MHZ
ATWLYYWW
CCCCC
*MMMMM
YWWLAZ
TBGA/
PBGA
Notes:
ATWLYYWW is the traceability code.
CCCCC is the country code.
MMMMM is the mask number.
YWWLAZ is the assembly traceability code.
Figure 45. Freescale Part Marking for TBGA or PBGA Devices
23 Document Revision History
This table provides a revision history of this document.
Table 72. Document Revision History
Rev.
Number
Date
Substantive Change(s)
12
09/2011
• In Section 2.2, “Power Sequencing,” added Section 2.2.1, “Power-Up Sequencing” and Figure 4.
• In Table 25, Table 29 and Table 31, removed the GTX_CLK125.
• In Table 34, updated tMDKHDX Max value from 170ns to 70ns.
11
11/2010
• In Table 56, added overbar to LCS[4] and LCS[5] signals. In Table 55 and Table 56, added note
for pin LGPL4.
• In Section 21.7, “Pull-Up Resistor Requirements, updated the list of open drain type pins.
10
9
05/2010
5/2009
• In Table 25 through Table 30, changed VIL(min) to VIH(max) to (20%–80%).
• Added Table 8, “EC_GTX_CLK125 AC Timing Specifications.”
• In Section 18.3, “Package Parameters for the MPC8347EA PBGA, changed solder ball for TBGA
and PBGA from 95.5 Sn/0.5 Cu/4 Ag to 96.5 Sn/3.5 Ag.
• In Table 58, updated frequency for DDR2, from 100-200 to 100-133 at core frequency = 533MHz.
• In Table 59, added two columns for the DDR1 and DDR2 memory bus frequency.
• In Table 70, footnote 1, changed 667(TBGA) to 533(TBGA). footnote 4, added data rate for DDR1
and DDR2.
MPC8347EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 12
Freescale Semiconductor
96
FREESCALE [ Freescale ]
