SERIAL INTERFACE
Serial-Addressing
MMA7660FC operates as a slave that sends and receives data through an I
2
C 2-wire interface. The interface uses a Serial
Data Line (SDA) and a Serial Clock Line (SCL) to achieve bi-directional communication between master(s) and slave(s). A
master (typically a microcontroller) initiates all data transfers to and from the device, and generates the SCL clock that
synchronizes the data transfer.
SDA
tSU DAT
tLOW
tHIGH
tR
tF
REPEAT ED ST ART
CONDIT ION
tHD DAT
tSU STA
tHD STA
tSU STO
tBUF
SCL
tHD STA
ST ART
CONDIT ION
ST OP
CONDIT ION
ST ART
CONDIT ION
Figure 7. 2-Wire Serial Interface Timing Details
The device’s SDA line operates as both an input and an open-drain output. A pull-up resistor, typically 4.7 kΩ, is required on
SDA. The device’s SCL line operates only as an input. A pull-up resistor, typically 4.7 kΩ, is required on SCL if there are multiple
masters on the 2-wire interface, or if the master in a single-master system has an open-drain SCL output.
Each transmission consists of a START condition (Figure
sent by a master, followed by MMA7660FC's 7-bit slave address
plus R/W bit, a register address byte, one or more data bytes, and finally a STOP condition.
SDA
SCL
DATA LINE STABLE
DATA VALID
CHANGE OF
DATA ALLOWED
Figure 8. Start and Stop Conditions
Start and Stop Conditions
Both SCL and SDA remain high when the interface is not busy. A master signals the beginning of a transmission with a
START (S) condition by transitioning SDA from high to low while SCL is high. When the master has finished communicating with
the slave, it issues a STOP (P) condition by transitioning SDA from low to high while SCL is high. The bus is then free for another
transmission.
Bit Transfer
One data bit is transferred during each clock tap. See
The data on SDA must remain stable while SCL is high.
SDA
SCL
S
START
CONDITION
Figure 9. Bit Transfer
P
STOP
CONDITION
MMA7660FC
Sensors
Freescale Semiconductor
22
FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
