General
Table 5. Power mode transition operating behaviors
Symbol
tPOR
Description
Min.
Max.
Unit
Notes
After a POR event, amount of time from the point VDD
reaches 1.71 V to execution of the first instruction
across the operating temperature range of the chip.
—
300
μs
1
—
—
—
—
—
—
—
130
130
70
μs
μs
μs
μs
μs
μs
μs
• VLLS0 → RUN
• VLLS1 → RUN
• VLLS2 → RUN
• VLLS3 → RUN
• LLS → RUN
70
6
5.2
5.2
• VLPS → RUN
• STOP → RUN
1. Normal boot (FTFL_OPT[LPBOOT]=1)
5.2.5 Power consumption operating behaviors
Table 6. Power consumption operating behaviors
Symbol Description
Min.
Typ.
Max.
Unit
Notes
IDDA
Analog supply current
—
—
See note
mA
1
IDD_RUN Run mode current — all peripheral clocks
disabled, code executing from flash
2
—
—
13.7
13.9
15.1
15.3
mA
mA
• @ 1.8V
• @ 3.0V
IDD_RUN Run mode current — all peripheral clocks
enabled, code executing from flash
3, 4
—
16.1
18.2
mA
• @ 1.8V
• @ 3.0V
• @ 25°C
• @ 125°C
—
—
16.3
16.7
17.7
18.4
mA
mA
IDD_WAIT Wait mode high frequency current at 3.0 V — all
peripheral clocks disabled
—
—
7.5
5.6
8.4
6.4
mA
mA
2
5
IDD_WAIT Wait mode reduced frequency current at 3.0 V
— all peripheral clocks disabled
Table continues on the next page...
K20 Sub-Family Data Sheet, Rev. 4 5/2012.
14
Freescale Semiconductor, Inc.