Family Configurations
1.1
Block Diagram
Figure 1 shows a top-level block diagram of the device. Package options for this family are described later in this document.
Slave Mode Access
(CIM_IBO/EzPort)
AN
QSPI
SDAn
M1
Arbiter
Interrupt
Controller
SCLn
M2 M0
UTXDn
URXDn
URTSn
UCTSn
PWMn
TMS
TDI
TDO
TRST
TCLK
BDM
PORT
I2C
0
Watch
Dog
UART UART UART
QSPI
RTC
0
1
2
DTINn/DTOUTn
GPT
JTAG
TAP
I2C
1
DTIM DTIM DTIM
DTIM
3
RCON_B
ALLPST
PST
0
1
2
JTAG_EN
DDATA
MAC
DIV
V2 ColdFire CPU
4 CH
DMA
PMM
CLKMOD
CFM
128 Kbytes
flash memory
(16K×16)×4
IPS Bus Gasket
16 Kbytes
SRAM
PORTS
CIM_IBO
RSTI
ADC
AN[7:0]
RSTO
Backup
Watchdog
CIM_IBO
VSTBY
VPP
Edge
Port
PLL OCO
CLKGEN
TIM
PIT0
PIT1
PWM
EXTAL XTAL CLKOUT
GPT[3:0]
IRQ[7:1]
MCF52259 ColdFire Microcontroller, Rev. 0
4
Freescale Semiconductor
FREESCALE [ Freescale ]
