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MC9S08QE8 参数 Datasheet PDF下载

MC9S08QE8图片预览
型号: MC9S08QE8
PDF下载: 下载PDF文件 查看货源
内容描述: 8位HCS08中央处理器 [8-Bit HCS08 Central Processor Unit]
分类和应用:
文件页数/大小: 46 页 / 942 K
品牌: FREESCALE [ Freescale ]
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MCU Block Diagram  
1
MCU Block Diagram  
The block diagram, Figure 1, shows the structure of MC9S08QE8 series MCU.  
BKGD/MS  
HCS08 CORE  
DEBUG MODULE (DBG)  
BDC  
CPU  
REAL-TIME COUNTER  
(RTC)  
PTA7/TPM2CH2/ADP9  
HCS08 SYSTEM CONTROL  
PTA6/TPM1CH2/ADP8  
SCL  
SDA  
PTA5/IRQ/TCLK/RESET  
RESETS AND INTERRUPTS  
MODES OF OPERATION  
POWER MANAGEMENT  
IIC MODULE (IIC)  
PTA4/ACMP1O/BKGD/MS  
PTA3/KBIP3/SCL/ADP3  
IRQ  
RxD  
TxD  
SERIAL COMMUNICATIONS  
INTERFACE MODULE (SCI)  
PTA2/KBIP2/SDA/ADP2  
COP  
IRQ  
LVD  
PTA1/KBIP1/TPM2CH0/ADP1/ACMP1–  
PTA0/KBIP0/TPM1CH0/ADP0/ACMP1+  
SS  
MISO  
USER FLASH  
(MC9S08QE8 = 8192 BYTES)  
(MC9S08QE4 = 4096 BYTES)  
PTB7/SCL/EXTAL  
SERIAL PERIPHERAL  
INTERFACE MODULE (SPI)  
MOSI  
SPSCK  
PTB6/SDA/XTAL  
PTB5/TPM1CH1/SS  
PTB4/TPM2CH1/MISO  
PTB3/KBIP7/MOSI/ADP7  
PTB2/KBIP6/SPSCK/ADP6  
PTB1/KBIP5/TxD/ADP5  
PTB0/KBIP4/RxD/ADP4  
TCLK  
USER RAM  
(MC9S08QE8 = 512 BYTES)  
(MC9S08QE4 = 256 BYTES)  
TPM1CH0  
16-BIT TIMER PWM  
MODULE (TPM1)  
TPM1CH1  
TPM1CH2  
TCLK  
20 MHz INTERNAL CLOCK  
SOURCE (ICS)  
TPM2CH0  
16-BIT TIMER PWM  
MODULE (TPM2)  
PTC7/ACMP2–  
PTC6/ACMP2+  
PTC5/ACMP2O  
PTC4  
TPM2CH1  
TPM2CH2  
LOW-POWER OSCILLATOR  
31.25 kHz to 38.4 kHz  
1 MHz to 16 MHz  
EXTAL  
XTAL  
(XOSCVLP)  
ACMP1O  
ACMP1–  
ACMP1+  
VSSA  
VDDA  
ANALOG COMPARATOR  
(ACMP1)  
PTC3  
VSS  
VDD  
PTC2  
VOLTAGE REGULATOR  
ACMP2O  
ACMP2–  
ACMP2+  
PTC1/TPM2CH2  
PTC0/TPM1CH2  
VSSA  
VDDA  
ANALOG COMPARATOR  
(ACMP2)  
VSSA/VREFL  
VDDA/VREFH  
PTD3  
PTD2  
PTD1  
PTD0  
12-BIT  
ANALOG-TO-DIGITAL  
CONVERTER (ADC12)  
ADP9–ADP0  
KBIP7–KBIP0  
VREFL  
VREFH  
KEYBOARD INTERRUPT  
MODULE (KBI)  
pins not available on 16-pin packages  
pins not available on 16-pin or 20-pin packages  
pins not available on 16-pin, 20-pin or 28-pin packages  
Notes: When PTA5 is configured as RESET, pin becomes bi-directional with output being open-drain drive containing an internal pullup device.  
When PTA4 is configured as BKGD, pin becomes bi-directional.  
For the 16-pin and 20-pin packages, VSSA/VREFL and VDDA/VREFH are double bonded to VSS and VDD respectively.  
Figure 1. MC9S08QE8 Series Block Diagram  
MC9S08QE8 Series, Rev. 3  
Freescale Semiconductor  
Preliminary  
3
Subject to Change Without Notice  
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