Freescale Semiconductor, Inc.
List of Figures
Figure
Title
Page
9-3
9-4
9-5
9-6
Program Register (PROG) . . . . . . . . . . . . . . . . . . . . . . . . .109
Option Register (Option) . . . . . . . . . . . . . . . . . . . . . . . . . .116
Mask Option Register 1 (MOR1) . . . . . . . . . . . . . . . . . . . .117
Mask Option Register 2 (MOR2) . . . . . . . . . . . . . . . . . . . .118
10-1
10-2
10-3
10-4
10-5
10-6
10-7
10-8
10-9
SCI Data Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .123
SCI Transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .124
SCI Transmitter I/O Register Summary . . . . . . . . . . . . . . .125
SCI Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .127
SCI Data Register (SCDR). . . . . . . . . . . . . . . . . . . . . . . . .129
SCI Control Register 1 (SCCR1) . . . . . . . . . . . . . . . . . . . .130
SCI Control Register 2 (SCCR2) . . . . . . . . . . . . . . . . . . . .131
SCI Status Register (SCSR) . . . . . . . . . . . . . . . . . . . . . . .133
Baud Rate Register (Baud) . . . . . . . . . . . . . . . . . . . . . . . .136
11-1
11-2
11-3
11-4
11-5
11-6
11-7
11-8
11-9
SPI Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .141
SPI I/O Register Summary. . . . . . . . . . . . . . . . . . . . . . . . .142
Master/Slave Connections . . . . . . . . . . . . . . . . . . . . . . . . .143
One Master and Three Slaves Block Diagram. . . . . . . . . .145
Two Master/Slaves and Three Slaves Block Diagram . . . .146
SPI Clock/Data Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . .146
SPI Data Register (SPDR) . . . . . . . . . . . . . . . . . . . . . . . . .149
SPI Control Register (SPCR) . . . . . . . . . . . . . . . . . . . . . . .149
SPI Status Register (SPSR). . . . . . . . . . . . . . . . . . . . . . . .151
13-1
13-2
13-3
Equivalent Test Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . .173
Typical Voltage Compared to Current . . . . . . . . . . . . . . . .177
Typical Current versus Internal
Frequency for Run and Wait Modes . . . . . . . . . . . . . . .179
Total Current Drain versus Frequency . . . . . . . . . . . . . . . .180
Timer Relationships . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .182
Stop Recovery Timing Diagram . . . . . . . . . . . . . . . . . . . . .183
Power-On Reset and External Reset Timing Diagram. . . .184
SPI Master Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .189
SPI Slave Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .190
13-4
13-5
13-6
13-7
13-8
13-9
MC68HC705C8A — Rev. 3
MOTOROLA
Technical Data
List of Figures
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FREESCALE [ Freescale ]
