Freescale Semiconductor, Inc.
List of Figures
Figure
Title
Page
5-1
5-2
5-3
5-4
6-1
6-2
Programmable COP Watchdog Diagram . . . . . . . . . . . . . . .63
Programmable COP Reset Register (COPRST) . . . . . . . . .64
Programmable COP Control Register (COPCR) . . . . . . . . .64
Non-Programmable COP Watchdog Diagram . . . . . . . . . . .67
Stop/Wait Mode Function Flowchart . . . . . . . . . . . . . . . . . .70
Programmable COP Watchdog
in Stop Mode (PCOPE = 1) Flowchart. . . . . . . . . . . . . . .72
Non-Programmable COP Watchdog
6-3
in Stop Mode (NCOPE = 1) Flowchart . . . . . . . . . . . . . .74
7-1
7-2
7-3
7-4
7-5
7-6
7-7
7-8
7-9
7-10
Port A Data Register (PORTA). . . . . . . . . . . . . . . . . . . . . . .78
Data Direction Register A (DDRA) . . . . . . . . . . . . . . . . . . . .79
Port A I/O Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .80
Port B Data Register (PORTB). . . . . . . . . . . . . . . . . . . . . . .81
Data Direction Register B (DDRB) . . . . . . . . . . . . . . . . . . . .82
Port B I/O Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .83
Port C Data Register (PORTC) . . . . . . . . . . . . . . . . . . . . . .85
Data Direction Register C (DDRC). . . . . . . . . . . . . . . . . . . .86
Port C I/O Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .87
Port D Fixed Input Register (PORTD) . . . . . . . . . . . . . . . . .88
8-1
8-2
8-3
8-4
8-5
8-6
8-7
8-8
8-10
8-9
8-11
8-12
Timer Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .90
Timer I/O Register Summary . . . . . . . . . . . . . . . . . . . . . . . .91
Input Capture Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . .92
Output Compare Operation . . . . . . . . . . . . . . . . . . . . . . . . .93
Timer Control Register (TCR) . . . . . . . . . . . . . . . . . . . . . . .94
Timer Status Register (TSR) . . . . . . . . . . . . . . . . . . . . . . . .96
Timer Registers (TRH and TRL) . . . . . . . . . . . . . . . . . . . . .97
Timer Register Reads . . . . . . . . . . . . . . . . . . . . . . . . . . . . .98
Alternate Timer Register Reads. . . . . . . . . . . . . . . . . . . . . .99
Alternate Timer Registers (ATRH and ATRL) . . . . . . . . . . .99
Input Capture Registers (ICRH and ICRL). . . . . . . . . . . . .100
Output Compare Registers (OCRH and OCRL). . . . . . . . .101
9-1
9-2
EPROM/OTPROM Programming Flowchart . . . . . . . . . . .105
PROM Programming Circuit. . . . . . . . . . . . . . . . . . . . . . . .106
Technical Data
16
MC68HC705C8A — Rev. 3
List of Figures
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