Memory Map
2.4 Vector Addresses and Priority
Addresses in the range $FFCC to $FFFF contain the user-specified vector locations. The vector
addresses are shown in
It is recommended that all vector addresses are defined.
Table 2-1. Vector Addresses
Address
Lowest Priority
$FFCC
$FFCD
$FFCE
$FFCF
$FFD0
$FFD1
$FFD2
$FFD3
$FFD4
$FFD5
$FFD6
$FFD7
$FFD8
$FFD9
$FFDA
$FFDB
$FFDC
$FFDD
$FFDE
$FFDF
$FFE0
$FFE1
$FFE2
$FFE3
$FFE4
$FFE5
$FFE6
$FFE7
$FFE8
$FFE9
Vector Description
TIMA Channel 5 Vector (High)
TIMA Channel 5 Vector (Low)
TIMA Channel 4 Vector (High)
TIMA Channel 4 Vector (Low)
ADC Vector (High)
ADC Vector (Low)
Keyboard Vector (High)
Keyboard Vector (Low)
SCI Transmit Vector (High)
SCI Transmit Vector (Low)
SCI Receive Vector (High)
SCI Receive Vector (Low)
SCI Error Vector (High)
SCI Error Vector (Low)
CAN Transmit Vector (High)
CAN Transmit Vector (Low)
CAN Receive Vector (High)
CAN Receive Vector (Low)
CAN Error Vector (High)
CAN Error Vector (Low)
CAN Wakeup Vector (High)
CAN Wakeup Vector (Low)
SPI Transmit Vector (High)
SPI Transmit Vector (Low)
SPI Receive Vector (High)
SPI Receive Vector (Low)
TIMB Overflow Vector (High)
TIMB Overflow Vector (Low)
TIMB CH1 Vector (High)
TIMB CH1 Vector (Low)
— Continued on next page
MC68HC908AZ32A Data Sheet, Rev. 2
38
Freescale Semiconductor
FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
