Freescale Semiconductor, Inc.
Technical Data — MC68HC11P2
Section 2. Pin Descriptions
2.1 Contents
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
VDD and VSS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
RESET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
Crystal driver and external clock input (XTAL, EXTAL) . . .24
E clock output (E) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
Phase-locked loop (XFC, VDDSYN) . . . . . . . . . . . . . . . . . . .26
Interrupt request (IRQ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
Nonmaskable interrupt (XIRQ/VPPE) . . . . . . . . . . . . . . . . . .32
2.10 MODA and MODB (MODA/LIR and MODB/VSTBY) . . . . . . .33
2.11 VRH and VRL. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
2.12 PG7/R/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
2.13 Port signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
2.2 Introduction
The MC68HC11P2 is available in an 84-pin plastic-leaded chip carrier
(PLCC); the MC68HC711P2 is also available in an 84-pin windowed
cerquad package, to allow full use of the EPROM. Most pins on this MCU
serve two or more functions, as described in the following paragraphs.
Refer to Figure 2-1 which shows the pin assignments for both 84-pin
packages.
MC68HC11P2 — Rev 1.0
Technical Data
Pin Descriptions
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