Freescale Semiconductor, Inc.
Resets and Interrupts
Low power operation
1B
I-bit in
CCR set?
Yes
No
I-bit interrupt
pending?
Stack
CPU registers
Yes
No
Fetch
opcode
Stack CPU registers.
Set X and I bits.
Fetch vector at
Legal
opcode?
No
$FFF8, $FFF9
Yes
WAI?
Yes
Stack
CPU registers
No
SWI?
Stack CPU registers.
Set X and I bits.
Fetch vector at
Interrupt
yet?
Yes
Yes
No
$FFF6, $FFF7
No
RTI?
Yes
Restore
CPU registers
from Stack
Set I-bit
No
Resolve interrupt
priority and fetch
vector
for highest pending
source (Figure 10-3)
Execute this
instruction
Start next instruction
sequence
1A
MC68HC11P2 — Rev 1.0
Technical Data
Resets and Interrupts
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