Maximum Tolerated Ratings
The MPC870 block diagram is shown in Figure 2.
Instruction
Bus
8-Kbyte
Instruction Cache
System Interface Unit (SIU)
Unified
Bus
Memory Controller
Internal External
Bus Interface Bus Interface
Unit Unit
Instruction MMU
32-Entry ITLB
Embedded
MPC8xx
Processor
Core
8-Kbyte
Data Cache
System Functions
Data MMU
32-Entry DTLB
Load/Store
Bus
PCMCIA-ATA Interface
Slave/Master IF
Fast Ethernet
Controller
DMAs
DMAs
FIFOs
4
Interrupt
8-Kbyte
Parallel I/O
Timers Controllers Dual-Port RAM
10/100
BaseT
Media Access
Control
4 Baud Rate
Generators
32-Bit RISC Controller
and Program
Virtual IDMA and
Serial DMAs
ROM
Parallel Interface Port
Timers
MIII / RMII
I2C
USB
SMC1
SPI
Serial Interface
Figure 2. MPC870 Block Diagram
3 Maximum Tolerated Ratings
This section provides the maximum tolerated voltage and temperature ranges for the MPC875/870. Table 2
displays the maximum tolerated ratings, and Table 3 displays the operating temperatures.
MPC875/MPC870 Hardware Specifications, Rev. 3.0
Freescale Semiconductor
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
7