Signal/Connection Descriptions
3.12
Timer
Table 12. Timer Signal
Signal Description
State
during
Reset
Signal
Name
Type
TIO0
Input or
Output
GPIO Input Timer 0 Schmitt-Trigger Input/Output—When timer 0 functions as an
external event counter or in measurement mode, TIO0 is used as input.
When timer 0 functions in watchdog, timer, or pulse modulation mode,
TIO0 is used as output.
The default mode after reset is GPIO input. This can be changed to
output or configured as a timer input/output through the timer 0
control/status register (TCSR0). If TIO0 is not being used, it is
recommended to either define it as GPIO output immediately at the
beginning of operation or leave it defined as GPIO input but connected
to VDD through a pull-up resistor in order to ensure a stable logic level
at this input.
Internal Pull down resistor.
This input is 5 V tolerant.
TIO1
Input or
Output
GPIO Input Timer 1 Schmitt-Trigger Input/Output—When timer 1 functions as an
external event counter or in measurement mode, TIO1 is used as input.
When timer 1 functions in watchdog, timer, or pulse modulation mode,
TIO1 is used as output.
The default mode after reset is GPIO input. This can be changed to
output or configured as a timer input/output through the timer 1
control/status register (TCSR1). If TIO1 is not being used, it is
recommended to either define it as GPIO output immediately at the
beginning of operation or leave it defined as GPIO input but connected
to Vdd through a pull-up resistor in order to ensure a stable logic level
at this input.
Internal Pull down resistor.
This input is 5 V tolerant.
3.13
JTAG/OnCE Interface
Table 13. JTAG/OnCE Interface
Signal Description
State
during
Reset
Signal
Name
Signal
Type
TCK
Input
Input
Test Clock—TCK is a test clock input signal used to synchronize the JTAG
test logic. It has an internal pull-up resistor.
Internal Pull up resistor.
This input is 5 V tolerant..
Freescale Semiconductor
DSP56371 Technical Data
29
FREESCALE [ Freescale ]
