Signal/Connection Descriptions
3.9
Enhanced Serial Audio Interface_1
Table 9. Enhanced Serial Audio Interface_1 Signals
State during
Signal Name
Signal Type
Signal Description
Reset
HCKR_1
Input or output
GPIO
High Frequency Clock for Receiver—When programmed as
disconnected an input, this signal provides a high frequency clock source for
the ESAI_1 receiver as an alternate to the DSP core clock.
When programmed as an output, this signal can serve as a
high-frequency sample clock (e.g., for external digital to analog
converters [DACs]) or as an additional system clock.
PE2
Input, output, or
disconnected
Port E2—When the ESAI_1 is configured as GPIO, this signal
is individually programmable as input, output, or internally
disconnected.
The default state after reset is GPIO disconnected.
Internal Pull down resistor.
This input is 5 V tolerant.
HCKT_1
Input or output
GPIO
High Frequency Clock for Transmitter—When programmed
disconnected as an input, this signal provides a high frequency clock source
for the ESAI_1 transmitter as an alternate to the DSP core
clock. When programmed as an output, this signal can serve as
a high frequency sample clock (e.g., for external DACs) or as an
additional system clock.
PE5
Input, output, or
disconnected
Port E5—When the ESAI_1 is configured as GPIO, this signal
is individually programmable as input, output, or internally
disconnected.
The default state after reset is GPIO disconnected.
Internal Pull down resistor.
This input is 5 V tolerant.
22
DSP56371 Technical Data
Freescale Semiconductor