Table 5. Electrical Characteristics
(T
A
= 25°C unless otherwise noted)
(continued)
Characteristic
Stage 2 — Off Characteristics
(1)
Zero Gate Voltage Drain Leakage Current
(V
DS
= 65 Vdc, V
GS
= 0 Vdc)
Zero Gate Voltage Drain Leakage Current
(V
DS
= 28 Vdc, V
GS
= 0 Vdc)
Gate--Source Leakage Current
(V
GS
= 1.5 Vdc, V
DS
= 0 Vdc)
Stage 2 — On Characteristics
(1)
Gate Threshold Voltage
(V
DS
= 10 Vdc, I
D
= 270
μAdc)
Gate Quiescent Voltage
(V
DS
= 28 Vdc, I
DQ2A
+ I
DQ2B
= 925 mAdc)
Fixture Gate Quiescent Voltage
(V
DD
= 28 Vdc, I
DQ2A
+ I
DQ2B
= 925 mAdc, Measured in Functional Test)
Drain--Source On--Voltage
(V
GS
= 10 Vdc, I
D
= 1 Adc)
Stage 2 — Dynamic Characteristics
(1,2)
Output Capacitance
(V
DS
= 28 Vdc
±
30 mV(rms)ac @ 1 MHz, V
GS
= 0 Vdc)
C
oss
—
380
—
pF
V
GS(th)
V
GS(Q)
V
GG(Q)
V
DS(on)
1
—
5.3
0.1
2
2.8
5.9
0.3
3
—
6.8
0.8
Vdc
Vdc
Vdc
Vdc
I
DSS
I
DSS
I
GSS
—
—
—
—
—
—
10
1
1
μAdc
μAdc
μAdc
Symbol
Min
Typ
Max
Unit
Functional Tests
(3)
(In Freescale Wideband 2110--2170 MHz Test Fixture, 50 ohm system) V
DD
= 28 Vdc, I
DQ1A
+ I
DQ1B
= 190 mA, I
DQ2A
+
I
DQ2B
= 925 mA, P
out
= 32 W Avg., f = 2167.5 MHz, Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = 7.5 dB @ 0.01%
Probability on CCDF. ACPR measured in 3.84 MHz Channel Bandwidth @
±5
MHz Offset.
Power Gain
Power Added Efficiency
Output Peak--to--Average Ratio @ 0.01% Probability on CCDF
Adjacent Channel Power Ratio
Input Return Loss
G
ps
PAE
PAR
ACPR
IRL
27
27
5.6
—
—
28.5
30
6.1
--38
--15
32
—
—
--36
--9
dB
%
dB
dBc
dB
Typical Performances
(3)
(In Freescale Test Fixture, 50 ohm system) V
DD
= 28 Vdc, I
DQ1A
+ I
DQ1B
= 190 mA, I
DQ2A
+ I
DQ2B
= 925 mA,
2110--2170 MHz Bandwidth
P
out
@ 1 dB Compression Point, CW
IMD Symmetry @ 112 W PEP, P
out
where IMD Third Order
Intermodulation
30 dBc (Delta IMD Third Order Intermodulation
between Upper and Lower Sidebands > 2 dB)
VBW Resonance Point
(IMD Third Order Intermodulation Inflection Point)
Gain Flatness in 60 MHz Bandwidth @ P
out
= 32 W Avg.
Quiescent Current Accuracy over Temperature
with 4.7 kΩ Gate Feed Resistors (--30 to 85°C)
(4)
Average Deviation from Linear Phase in 60 MHz Bandwidth
@ P
out
= 110 W CW
Average Group Delay @ P
out
= 110 W CW, f = 2140 MHz
Part--to--Part Insertion Phase Variation @ P
out
= 110 W CW,
f = 2140 MHz, Six Sigma Window
Gain Variation over Temperature (--30°C to +85°C)
Output Power Variation over Temperature (--30°C to +85°C)
1.
2.
3.
4.
P1dB
IMD
sym
—
—
—
—
—
—
—
—
—
—
110
50
50
0.3
±3
0.6
2.6
35
0.042
0.003
—
—
—
—
—
—
—
—
—
—
MHz
dB
%
°
ns
°
dB/°C
dB/°C
W
MHz
VBW
res
G
F
∆I
QT
Φ
Delay
∆Φ
∆G
∆P1dB
Each side of device measured separately.
Part internally matched both on input and output.
Measurement made with device in a single--ended configuration.
Refer to AN1977,
Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family
and to AN1987,
Quiescent Current Control
for the RF Integrated Circuit Device Family.
Go to http://www.freescale.com/rf. Select Documentation/Application Notes -- AN1977 or AN1987.
MD7IC21100NR1 MD7IC21100GNR1 MD7IC21100NBR1
RF Device Data
Freescale Semiconductor, Inc.
3