Freescale Semiconductor, Inc.
AN2528/D
Function Set Configuration
Table 2. Example of configuration
Channel
0
1
2
3
4
5
10
15
TPU function
svmStd_top
svmStd_bottom
svmStd_top
svmStd_bottom
svmStd_top
svmStd_bottom
svmStd_sync
svmStd_fault
Priority
high
high
high
high
high
high
low
high
Freescale Semiconductor, Inc...
Table 3. Example of configuration
Channel
0
1
2
3
4
5
10
11
15
TPU function
svmStd_top
svmStd_top
svmStd_top
svmStd_bottom
svmStd_bottom
svmStd_bottom
svmStd_sync
svmStd_res
svmStd_fault
Priority
high
high
high
high
high
high
low
low
high
shows the TPU function code sizes.
Table 4. TPU function code sizes
TPU function
svmStd_top
svmStd_bottom
svmStd_sync
svmStd_res
svmStd_fault
Code size
16
µ
instructions + 8 entries = 24 long words
197
µ
instructions + 8 entries = 205 long words
26
µ
instructions + 8 entries = 34 long words
38
µ
instructions + 8 entries = 46 long words
9
µ
instructions + 8 entries = 17 long words
Configuration Order
The CPU configures the TPU as follows.
1. Disables the channels by clearing the two channel priority bits on each
channel used (not necessary after reset).
2. Selects the channel functions on all used channels by writing the
function numbers to the channel function select bits.
Standard Space Vector Modulation TPU Function Set (svmStd)
3
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