11/2/95
SECTION 1: OVERVIEW
UM Rev.1.0
Freescale Semiconductor, Inc.
TABLE OF CONTENTS (Continued)
Paragraph
Number
Page
Number
Title
3.4
CPU Space Cycles...........................................................................................3-21
Breakpoint Acknowledge Cycle.................................................................3-22
LPSTOP Broadcast Cycle...........................................................................3-23
Module Base Address Register Access....................................................3-27
Interrupt Acknowledge Bus Cycles............................................................3-27
Interrupt Acknowledge Cycle—Terminated Normally........................3-27
Autovector Interrupt Acknowledge Cycle.............................................3-29
Spurious Interrupt Cycle..........................................................................3-30
Bus Exception Control Cycles........................................................................3-32
Bus Errors.......................................................................................................3-34
Retry Operation.............................................................................................3-36
Halt Operation ...............................................................................................3-38
Double Bus Fault ..........................................................................................3-39
Bus Arbitration...................................................................................................3-40
Bus Request...................................................................................................3-43
Bus Grant........................................................................................................3-43
Bus Grant Acknowledge..............................................................................3-43
Bus Arbitration Control.................................................................................3-44
Show Cycles..................................................................................................3-44
Reset Operation ................................................................................................3-46
3.4.1
3.4.2
3.4.3
3.4.4
3.4.4.1
3.4.4.2
3.4.4.3
3.5
3.5.1
3.5.2
3.5.3
3.5.4
3.6
3.6.1
3.6.2
3.6.3
3.6.4
3.6.5
3.7
Section 4
System Integration Module
4.1
4.2
4.2.1
4.2.2
Module Overview..............................................................................................4-1
Module Operation.............................................................................................4-2
Module Base Address Register Operation...............................................4-2
System Configuration and Protection Operation....................................4-3
System Configuration..............................................................................4-5
Internal Bus Monitor.................................................................................4-6
Double Bus Fault Monitor........................................................................4-6
Spurious Interrupt Monitor......................................................................4-6
Software Watchdog..................................................................................4-6
Periodic Interrupt Timer ...........................................................................4-7
Periodic Timer Period Calculation.....................................................4-8
Using the Periodic Timer as a Real-Time Clock.............................4-9
Simultaneous Interrupts by Sources in the SIM40.............................4-9
Clock Synthesizer Operation......................................................................4-9
Phase Comparator and Filter .................................................................4-11
Frequency Divider ....................................................................................4-12
Clock Control.............................................................................................4-13
Chip Select Operation.................................................................................4-13
Programmable Features..........................................................................4-14
4.2.2.1
4.2.2.2
4.2.2.3
4.2.2.4
4.2.2.5
4.2.2.6
4.2.2.6.1
4.2.2.6.2
4.2.2.7
4.2.3
4.2.3.1
4.2.3.2
4.2.3.3
4.2.4
4.2.4.1
vi
MC68340 USER'S MANUAL
MOTOROLA
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