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AN1063D 参数 Datasheet PDF下载

AN1063D图片预览
型号: AN1063D
PDF下载: 下载PDF文件 查看货源
内容描述: 集成的处理器与DMA USERA ????手册 [Integrated Processor with DMA User’s Manual]
分类和应用:
文件页数/大小: 441 页 / 2488 K
品牌: FREESCALE [ Freescale ]
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11/2/95  
SECTION 1: OVERVIEW  
UM Rev 1  
Freescale Semiconductor, Inc.  
TABLE OF CONTENTS (Continued)  
Paragraph  
Number  
Page  
Number  
Title  
2.15  
Test Signals.......................................................................................................2-13  
Test Clock (TCK)...........................................................................................2-13  
Test Mode Select (TMS)..............................................................................2-13  
Test Data In (TDI)..........................................................................................2-13  
Test Data Out (TDO).....................................................................................2-13  
2.15.1  
2.15.2  
2.15.3  
2.15.4  
2.16  
Synthesizer Power (V )..........................................................................2-13  
CCSYN  
2.17  
System Power and Ground (V and GND)................................................2-13  
CC  
2.18  
Signal Summary...............................................................................................2-13  
Section 3  
Bus Operation  
3.1  
Bus Transfer Signals........................................................................................3-1  
Bus Control Signals.....................................................................................3-2  
Function Code Signals................................................................................3-3  
Address Bus (A31–A0)................................................................................3-4  
Address Strobe (AS)....................................................................................3-4  
Data Bus (D15–D0)......................................................................................3-4  
Data Strobe (DS)...........................................................................................3-4  
Bus Cycle Termination Signals..................................................................3-4  
Data Transfer and Size Acknowledge Signals  
3.1.1  
3.1.2  
3.1.3  
3.1.4  
3.1.5  
3.1.6  
3.1.7  
3.1.7.1  
(DSACK1 and DSACK0).....................................................................3-4  
Bus Error (BERR).......................................................................................3-5  
Autovector (AVEC)....................................................................................3-5  
Data Transfer Mechanism...............................................................................3-5  
Dynamic Bus Sizing.....................................................................................3-5  
Misaligned Operands...................................................................................3-7  
Operand Transfer Cases.............................................................................3-7  
Byte Operand to 8-Bit Port, Odd or Even (A0 = X)..............................3-7  
Byte Operand to 16-Bit Port, Even (A0 = 0)..........................................3-8  
Byte Operand to 16-Bit Port, Odd (A0 = 1)...........................................3-9  
Word Operand to 8-Bit Port, Aligned.....................................................3-9  
Word Operand to 16-Bit Port, Aligned...................................................3-10  
Long-word Operand to 8-Bit Port, Aligned...........................................3-10  
Long-Word Operand to 16-Bit Port, Aligned........................................3-12  
Bus Operation................................................................................................3-14  
Synchronous Operation with DSACK.....................................................3-14  
Fast Termination Cycles..............................................................................3-15  
Data Transfer Cycles........................................................................................3-16  
Read Cycle.....................................................................................................3-16  
Write Cycle.....................................................................................................3-18  
Read-Modify-Write Cycle.............................................................................3-19  
3.1.7.2  
3.1.7.3  
3.2  
3.2.1  
3.2.2  
3.2.3  
3.2.3.1  
3.2.3.2  
3.2.3.3  
3.2.3.4  
3.2.3.5  
3.2.3.6  
3.2.3.7  
3.2.4  
3.2.5  
3.2.6  
3.3  
3.3.1  
3.3.2  
3.3.3  
MOTOROLA  
MC68340 USER'S MANUAL  
v
For More Information On This Product,  
Go to: www.freescale.com  
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