Freescale Semiconductor, Inc.
1.2.1 CPU32
The CPU32 is an M68000 family processor specially designed for use as a 32-bit core
processor and for operation over the intermodule bus (IMB). Designers used the
MC68020 as a model and included advances of the later M68000 family processors,
resulting in an instruction execution performance of 4 MIPS (VAX-equivalent) at 25.16
MHz.
The powerful and flexible M68000 architecture is the basis of the CPU32. MC68000
(including the MC68HC000 and the MC68EC000) and MC68010 user programs will run
unmodified on the CPU32. The programmer can use any of the eight 32-bit data registers
for fast manipulation of data and any of the eight 32-bit address registers for indexing data
in memory. The CPU32 can operate on data types of single bits, binary-coded decimal
(BCD) digits, and 8, 16, and 32 bits. Peripherals and data in memory can reside anywhere
in the 4-Gbyte linear address space. A supervisor operating mode protects system-level
resources from the more restricted user mode, allowing a true virtual environment to be
developed.
Flexible instructions for data movement, arithmetic functions, logical operations, shifts and
rotates, bit set and clear, conditional and unconditional program branches, and overall
system control are supported, including a fast 32 × 32 multiply and 32-bit conditional
branches. New instructions, such as table lookup and interpolate and low power stop,
support the specific requirements of embedded control applications. Many addressing
modes complement these instructions, including predecrement and postincrement, which
allow simple stack and queue maintenance and scaled indexed for efficient table
accesses. Data types and addressing modes are supported orthogonally by all data
operations and with all appropriate addressing modes. Position-independent code is easily
written.
The CPU32 is specially optimized to run with the MC68340's 16-bit data bus. Most
instructions execute in one-half the number of clocks compared to the original MC68000,
yielding an overall 1.6 times the performance of the same-speed MC68000 and measuring
10,045 Dhrystones/sec @ 25.16 MHz (6,742 Dhrystones/sec @ 16.78 MHz).
Like all M68000 family processors, the CPU32 recognizes interrupts of seven different
priority levels and allows the peripheral to vector the processor to the desired service
routine. Internal trap exceptions ensure proper instruction execution with good addresses
and data, allow operating system intervention in special situations, and permit instruction
tracing. Hardware signals can either terminate or rerun bad memory accesses before
instructions process data incorrectly.
The CPU32 offers the programmer full 32-bit data processing performance with complete
M68000 compatibility, yet with more compact code than is available with RISC
processors. The CPU32 is identical in all CPU32-based M68300 family products.
1.2.2 Background Debug Mode
A special operating mode is available in the CPU32 in which normal instruction execution
is suspended while special on-chip microcode performs the functions of a debugger.
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MC68340 USER’S MANUAL
MOTOROLA
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