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AN1063D 参数 Datasheet PDF下载

AN1063D图片预览
型号: AN1063D
PDF下载: 下载PDF文件 查看货源
内容描述: 集成的处理器与DMA USERA ????手册 [Integrated Processor with DMA User’s Manual]
分类和应用:
文件页数/大小: 441 页 / 2488 K
品牌: FREESCALE [ Freescale ]
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Freescale Semiconductor, Inc.  
All unimplemented instructions are reserved for use by Motorola for enhancements and  
extensions to the basic M68000 architecture. Opcode pattern $4AFC is defined to be  
illegal on all M68000 family members. Those customers requiring the use of an  
unimplemented opcode for synthesis of "custom instructions," operating system calls, etc.,  
should use this opcode.  
Exception processing for illegal and unimplemented instructions is similar to that for traps.  
The instruction is fetched and decoding is attempted. When the processor determines that  
execution of an illegal instruction is being attempted, exception processing begins. No  
registers are altered.  
Exception processing follows the regular sequence. The vector number is generated to  
refer to the illegal instruction vector or in the case of an unimplemented instruction, to the  
corresponding emulation vector. The illegal instruction vector number, current PC, and a  
copy of the SR are saved on the supervisor stack, with the saved value of the PC being  
the address of the illegal or unimplemented instruction.  
5.5.2.9 PRIVILEGE VIOLATIONS. To provide system security, certain instructions can be  
executed only at the supervisor access level. An attempt to execute one of these  
instructions at the user level will cause an exception. The privileged exceptions are as  
follows:  
• AND Immediate to SR  
• EOR Immediate to SR  
• LPSTOP  
• MOVE from SR  
• MOVE to SR  
• MOVE USP  
• MOVEC  
• MOVES  
• OR Immediate to SR  
• RESET  
• RTE  
• STOP  
Exception processing for privilege violations is nearly identical to that for illegal  
instructions. The instruction is fetched and decoded. If the processor determines that a  
privilege violation has occurred, exception processing begins before instruction execution.  
Exception processing follows the regular sequence. The vector number (8) is generated to  
reference the privilege violation vector. Privilege violation vector offset, current PC, and  
SR are saved on the supervisor stack. The saved PC value is the address of the first word  
of the instruction causing the privilege violation.  
5- 48  
MC68340 USER’S MANUAL  
MOTOROLA  
For More Information On This Product,  
Go to: www.freescale.com  
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