Freescale Semiconductor, Inc.
5.5.1 Exception Vectors
An exception vector is the address of a routine that handles an exception. The VBR
contains the base address of a 1024-byte exception vector table, which consists of 256
exception vectors. Sixty-four vectors are defined by the processor, and 192 vectors are
reserved for user definition as interrupt vectors. Except for the reset vector which is two
long words, each vector in the table is one long word. Refer to Table 5-16 for information
on vector assignment.
Table 5-16. Exception Vector Assignments
Vector Offset
Vector Number
Dec
0
Hex
000
004
008
00C
010
014
018
01C
020
024
028
02C
030
034
038
03C
Space
SP
SP
SD
SD
SD
SD
SD
SD
SD
SD
SD
SD
SD
SD
SD
SD
SD
Assignment
Reset: Initial Stack Pointer
0
1
4
Reset: Initial Program Counter
Bus Error
2
8
3
12
16
20
24
28
32
36
40
44
48
52
56
60
Address Error
4
Illegal Instruction
5
Zero Division
6
CHK, CHK2 Instructions
TRAPcc, TRAPV Instructions
Privilege Violation
7
8
9
Trace
10
11
12
13
14
15
16–23
Line 1010 Emulator
Line 1111 Emulator
Hardware Breakpoint
(Reserved for Coprocessor Protocol Violation)
Format Error
Uninitialized Interrupt
64
92
040
05C
(Unassigned, Reserved)
—
24
25
96
060
064
068
06C
070
074
078
07C
SD
SD
SD
SD
SD
SD
SD
SD
SD
Spurious Interrupt
100
104
108
112
116
120
124
Level 1 Interrupt Autovector
Level 2 Interrupt Autovector
Level 3 Interrupt Autovector
Level 4 Interrupt Autovector
Level 5 Interrupt Autovector
Level 6 Interrupt Autovector
Level 7 Interrupt Autovector
26
27
28
29
30
31
32–47
128
188
080
0BC
Trap Instruction Vectors (0–15)
—
48–58
59–63
192
232
0C0
0E8
SD
SD
(Reserved for Coprocessor)
—
236
252
0EC
0FC
(Unassigned, Reserved)
—
64–255
256
1020
100
3FC
SD
User-Defined Vectors (192)
MOTOROLA
MC68340 USER’S MANUAL
5- 39
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