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68HC912DG128PV8 参数 Datasheet PDF下载

68HC912DG128PV8图片预览
型号: 68HC912DG128PV8
PDF下载: 下载PDF文件 查看货源
内容描述: M68HC12微控制器 [M68HC12 Microcontrollers]
分类和应用: 微控制器外围集成电路时钟
文件页数/大小: 452 页 / 3509 K
品牌: FREESCALE [ Freescale ]
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Freescale Semiconductor, Inc.  
Development Support  
Breakpoints  
18.5 Breakpoints  
Hardware breakpoints are used to debug software on the  
MC68HC912DG128 by comparing actual address and data values to  
predetermined data in setup registers. A successful comparison will  
place the CPU in background debug mode (BDM) or initiate a software  
interrupt (SWI). Breakpoint features designed into the  
MC68HC912DG128 include:  
• Mode selection for BDM or SWI generation  
• Program fetch tagging for cycle of execution breakpoint  
• Second address compare in dual address modes  
• Range compare by disable of low byte address  
• Data compare in full feature mode for non-tagged breakpoint  
• Byte masking for high/low byte data compares  
• R/W compare for non-tagged compares  
• Tag inhibit on BDM TRACE  
18.5.1 Breakpoint Modes  
Three modes of operation determine the type of breakpoint in effect.  
• Dual address-only breakpoints, each of which will cause a  
software interrupt (SWI)  
• Single full-feature breakpoint which will cause the part to enter  
background debug mode (BDM)  
• Dual address-only breakpoints, each of which will cause the part  
to enter BDM  
Breakpoints will not occur when BDM is active.  
MC68HC912DG128 — Rev 3.0  
Technical Data  
Development Support  
For More Information On This Product,  
Go to: www.freescale.com  
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