Freescale Semiconductor, Inc.
Central Processing Unit
Table 2-1. M68HC12 Addressing Mode Summary
Addressing Mode
Source Format
Abbreviation
Description
INST
Inherent
(no externally supplied
operands)
INH
Operands (if any) are in CPU registers
INST #opr8i
or
INST #opr16i
Operand is included in instruction stream
8- or 16-bit size implied by context
Immediate
IMM
Operand is the lower 8-bits of an address in the
range $0000 – $00FF
Direct
INST opr8a
DIR
Extended
INST opr16a
EXT
Operand is a 16-bit address
INST rel8
or
INST rel16
An 8-bit or 16-bit relative offset from the current
pc is supplied in the instruction
Relative
REL
Indexed
(5-bit offset)
INST oprx5,xysp
INST oprx3,–xys
INST oprx3,+xys
IDX
IDX
IDX
5-bit signed constant offset from x, y, sp, or pc
Auto pre-decrement x, y, or sp by 1 ~ 8
Auto pre-increment x, y, or sp by 1 ~ 8
Indexed
(auto pre-decrement)
Indexed
(auto pre-increment)
Indexed
(auto post-
decrement)
INST oprx3,xys–
IDX
Auto post-decrement x, y, or sp by 1 ~ 8
Auto post-increment x, y, or sp by 1 ~ 8
Indexed
(auto post-increment)
INST oprx3,xys+
INST abd,xysp
IDX
IDX
Indexed
(accumulator offset)
Indexed with 8-bit (A or B) or 16-bit (D)
accumulator offset from x, y, sp, or pc
Indexed
(9-bit offset)
9-bit signed constant offset from x, y, sp, or pc
(lower 8-bits of offset in one extension byte)
INST oprx9,xysp
INST oprx16,xysp
IDX1
IDX2
Indexed
(16-bit offset)
16-bit constant offset from x, y, sp, or pc
(16-bit offset in two extension bytes)
Pointer to operand is found at...
16-bit constant offset from x, y, sp, or pc
(16-bit offset in two extension bytes)
Indexed-Indirect
(16-bit offset)
INST [oprx16,xysp]
INST [D,xysp]
[IDX2]
Indexed-Indirect
(D accumulator
offset)
Pointer to operand is found at...
x, y, sp, or pc plus the value in D
[D,IDX]
Technical Data
MC68HC912DG128 — Rev 3.0
Central Processing Unit
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