Freescale Semiconductor, Inc.
PLL Tuned UHF Transmitter Module
Interface with MCU Core
16.7 Interface with MCU Core
There are three inputs from the microprocessor (PLLEN, DATA, and
MODE) to control the circuit state, and one output to the microprocessor
(UPCLK). When inputs MODE and PLLEN are both 0, the circuit is in
sleep mode and draws only a leakage current from the V supply. The
CC
other states are controlled using simple or extended modes, as
described in 16.7.1 Simple Control Mode and 16.7.2 Extended
Control Mode.
NOTE: UPCLK is the clock output to the microcontroller. Its frequency is equal
to the crystal frequency divided by 16.
16.7.1 Simple Control Mode
This mode is useful when only OOK modulation is required and
Manchester coding capability of the integrated RF module is not used.
The microcontroller drives only two pins: PLLEN and DATA, MODE
being wired to GND. Setting PLLEN to 1 enables the PLL and switches
the UPCLK on; the signal sent to DATA is then transmitted in OOK
format. See Figure 16-2.
PLLEN
UPCLK
PLL
DATA
RF OUT (OOK)
SUPPLY CURRENT
(NOT SCALED)
Figure 16-2. Simple Control Mode Timing
MC68HC908RFRK2
MOTOROLA
AdvanceInformation
PLL Tuned UHF Transmitter Module
225
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