Freescale Semiconductor, Inc.
GENERAL RELEASE SPECIFICATION
Bit 7
0
6
1
5
0
4
0
3
1
2
0
1
Bit 0
8
2
$0F
Read:
Write:
Reset:
OPTCOP
OPTIRQ
Unaffected by reset
3
Figure A-1. MC68HC705P3 Mask Option Register
4
5
Bit 7
—
6
5
4
3
2
1
Bit 0
COP
$900
Read:
Write:
Reset:
RC
SWAIT
SPR1
SPR0
LSBF
IRQ
6
7
Unaffected by reset
8
Figure A-2. MC68HC705P6 Mask Option Register
9
Bit 7
—
6
5
4
3
2
1
Bit 0
COP
10
11
12
13
14
A
$900
Read:
Write:
Reset:
—
—
—
—
SIOP
IRQ
Unaffected by reset
Figure A-3. MC68HC705P9 Mask Option Register
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Write:
Reset:
CLKOUT
LVRE
SWAIT
SPR1
SPR0
LSBF
LEVIRQ
COPEN
MOR1
Unaffected by reset
16
17
18
19
20
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Write:
Reset:
PA7PU
PA6PU
PA5PU
PA4PU
PA3PU
PA2PU
PA1PU
PA0PU
MOR2
Unaffected by reset
Figure A-4. MC68HC805P18 Mask Option Register
EMULATION
Rev. 1.0
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