Freescale Semiconductor, Inc.
GENERAL RELEASE SPECIFICATION
Table A-3. P-Series Features
8
2
Devices
P1A
Mask Option
MOR
N
A/D
N
LVR
N
High Current
Y
Y
Y
N
P2
N
N
N
3
P3/705P3
P4/P4A
P6/705P6
P7/P7A
P8
Y/N
Y
N/Y
N
N
N
N
4
N
N
N/Y
N
Y/N
Y
N/Y
N
Y
N
5
N
N
N/Y
N
Y
N
Y
N
6
P9/705P9/P9A
P10
Y/N/Y
Y
N/Y/N
N
Y
N
N/N/Y
N
N
N
7
P18/805P18
Y/N
N/Y
Y
Y
Y
8
9
Table A-4. Mask Options
SIOP
SIOP
Port A
PU/INT
STOP
10
11
12
13
14
A
Devices
XTAL/RC
Clock Rate
MSB/LSB
to HALT
P1A
P2
Y
Y
N
Y
Y
Y
N
N
Y
N
N
N
N
N
Y
N
N
N
Y
Y
Y
N
Y
Y
Y
Y
N
Y
N
P3
N
N
P4/P4A
P6
N/Y
N
N/Y
Y
P7/P7A
P8
N
N
N
N
Y*
N/Y
N
N/Y
N
P9/P9A
P10
N/Y
Y
N/Y
N
16
17
18
19
20
P18
Y
Y
* The MC68HC05P18 and MC68HC805P18 have selectable clock rates that are four times as fast as the
MC68HC05P6 selectable rates.
EMULATION
MC68HC805P18
A-4
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