August 27, 1998
GENERAL RELEASE SPECIFICATION
Table 17-6. Instruction Set Summary (Continued)
Effect on
CCR
Source
Form
Operation
Description
H I N Z C
SUB #opr
IMM A0 ii
DIR B0 dd
EXT C0 hh ll
2
3
4
5
4
3
SUB opr
SUB opr
SUB opr,X
SUB opr,X
SUB ,X
Subtract Memory
Byte from
Accumulator
A ← (A) – (M)
— —
↕
↕
↕
IX2
IX1
IX
D0 ee ff
E0 ff
F0
PC ← (PC) + 1; Push (PCL)
SP ← (SP) – 1; Push (PCH)
SP ← (SP) – 1; Push (X)
SP ← (SP) – 1; Push (A)
SP ← (SP) – 1; Push (CCR)
SP ← (SP) – 1; I ← 1
SWI
TAX
Software Interrupt
— 1 — — — INH
83
97
10
PCH ← Interrupt Vector High Byte
PCL ← Interrupt Vector Low Byte
Transfer
Accumulator to
Index Register
X ← (A)
(M) – $00
A ← (X)
— — — — — INH
2
TST opr
TSTA
TSTX
TST opr,X
TST ,X
DIR
INH
3D dd
4D
5D
6D ff
7D
4
3
3
5
4
Test Memory Byte
for Negative or Zero
— —
↕
↕ —
INH
IX1
IX
Transfer Index
Register to
Accumulator
TXA
— — — — — INH
— 0 — — — INH
9F
8F
2
2
Stop CPU Clock and
Enable
WAIT
Interrupts
A
C
Accumulator
Carry/borrow flag
opr
PC
Operand (one or two bytes)
Program counter
CCR
dd
Condition code register
Direct address of operand
Direct address of operand and relative offset of branch instruction
Direct addressing mode
High and low bytes of offset in indexed, 16-bit offset addressing
Extended addressing mode
PCH
PCL
REL
rel
rr
SP
X
Z
Program counter high byte
Program counter low byte
Relative addressing mode
Relative program counter offset byte
Relative program counter offset byte
Stack pointer
dd rr
DIR
ee ff
EXT
ff
Offset byte in indexed, 8-bit offset addressing
Half-carry flag
Index register
Zero flag
H
hh ll
I
High and low bytes of operand address in extended addressing
Interrupt mask
#
Immediate value
Logical AND
ii
Immediate operand byte
Logical OR
IMM
INH
IX
IX1
IX2
M
Immediate addressing mode
Inherent addressing mode
Indexed, no offset addressing mode
Indexed, 8-bit offset addressing mode
Indexed, 16-bit offset addressing mode
Memory location
Logical EXCLUSIVE OR
Contents of
Negation (two’s complement)
Loaded with
( )
–( )
←
?
:
↕
—
If
Concatenated with
Set or cleared
Not affected
N
n
Negative flag
Any bit
MC68HC05SB7
REV 2.1
INSTRUCTION SET
MOTOROLA
17-13
FREESCALE [ Freescale ]
