Freescale Semiconductor, Inc.
General Release Specification
COP Clear Register
2.9 COP Cle a r Re g iste r
The computer operating properly (COP) watchdog timer is located at
address $1FF0. Writing a logical zero to bit zero of this location will clear
the COP watchdog counter as described in 4.4.2 Computer Operating
Properly (COP) Reset.
$1FF0
Read:
Write:
Reset:
Bit 7
0
6
0
5
0
4
0
3
0
2
0
1
0
Bit 0
0
COPR
Unimplemented
Figure 2-5. COP Watchdog Timer Location
MC68HC705P6A — Rev. 1.0
General Release Specification
Memory
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