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68HC705JJ7_1 参数 Datasheet PDF下载

68HC705JJ7_1图片预览
型号: 68HC705JJ7_1
PDF下载: 下载PDF文件 查看货源
内容描述: 常规版本规格 [General Release Specification]
分类和应用:
文件页数/大小: 230 页 / 5548 K
品牌: FREESCALE [ Freescale ]
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Freescale Semiconductor, Inc.  
Ce ntra l Proc e ssor Unit (CPU)  
3.6 Prog ra m Counte r (PC)  
The program counter is a 16-bit register that contains the address of the  
next instruction or operand to be fetched as shown in Figure 3-5. The  
three most significant bits of the program counter are ignored internally  
and appear as 111 during stacking and subroutine calls.  
Normally, the address in the program counter automatically increments  
to the next sequential memory location every time an instruction or  
operand is fetched. Jump, branch, and interrupt operations load the  
program counter with an address other than that of the next sequential  
location.  
Bit  
Bit  
0
15 14 13 12 11 10  
9
8
7
6
5
4
3
2
1
Read:  
Write:  
Reset:  
1
0
1
0
1
0
Loaded with Vector from $1FFE and $1FFF  
Figure 3-5. Program Counter (PC)  
3.7 Cond ition Cod e Re g iste r (CCR)  
The condition code register is an 8-bit register whose three most  
significant bits are permanently fixed at 111 as shown in Figure 3-6. The  
condition code register contains the interrupt mask and four flags that  
indicate the results of the instruction just executed. The following  
paragraphs describe the functions of the condition code register.  
Bit 7  
1
6
1
1
5
1
1
4
3
I
2
1
Bit 0  
Z
Read:  
Write:  
Reset:  
H
U
N
U
C
U
1
1
U
U = Unaffected  
Figure 3-6. Condition Code Register (CCR)  
General Release Specification  
MC68HC705JJ7/MC68HC705JP7 Rev. 3.0  
Central Processor Unit (CPU)  
For More Information On This Product,  
Go to: www.freescale.com  
 
 
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