Freescale Semiconductor, Inc.
EPROM/ OTPROM
13.3.1 EPROM Prog ra m m ing Re g iste r (EPROG)
The EPROM programming register shown in Figure 13-1 contains the
control bits for programming the EPROM. In normal operation, the
EPROM programming register contains all logic zeros.
$001C
Read:
Write:
Reset:
Bit 7
0
6
0
5
0
4
0
3
0
2
ELAT
0
1
MPGM
0
Bit 0
EPGM
0
R
0
R
0
R
0
R
0
0
= Unimplemented
R
= Reserved for test
Figure 13-1. EPROM Programming Register (EPROG)
EPGM — EPROM Programming
This read/write bit applies the voltage from the IRQ/V pin to the
PP
EPROM. To write the EPGM bit, the ELAT bit must already be set.
Clearing the ELAT bit also clears the EPGM bit. Reset clears EPGM.
1 = EPROM programming power switched on
0 = EPROM programming power switched off
MPGM — Mask Option Register (MOR) Programming
This read/write bit applies programming power from the IRQ/V pin
PP
to the MOR. Reset clears MPGM.
1 = MOR programming power switched on
0 = MOR programming power switched off
ELAT — EPROM Bus Latch
This read/write bit configures address and data buses for
programming the EPROM array. EPROM data cannot be read when
ELAT is set. Clearing the ELAT bit also clears the EPGM bit. Reset
clears ELAT.
1 = Address and data buses configured for EPROM programming
of the array. The address and data buses are latched in the
EPROM array when a subsequent write to the array is made.
Data in the EPROM array cannot be read.
0 = Address and data buses configured for normal operation
General Release Specification
MC68HC705JJ7/MC68HC705JP7 — Rev. 3.0
EPROM/OTPROM
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