Freescale Semiconductor, Inc.
GENERAL RELEASE SPECIFICATION
MC68HC05BD7 Rev. 2.0
6.7
COP Watchdog Timer Considerations
The COP Watchdog Timer is always enable in MC68HC05BD7. It will reset the MCU when
it times out. For a system that must have intentional uses of the WAIT Mode, care must be
taken to prevent such situations from happening during normal operations by arranging
timely interrupts to reset the COP Watchdog timer.
WAIT
External Oscillator Active,
and Internal
Timer Clock Active
Stop Internal Processor Clock,
Clear I-Bit in CCR
Y
External
RESET?
N
Internal
COP
Y
RESET?
N
External
H/W
Y
Interrupt?
N
Y
Internal
Interrupt?
N
Restart
Internal Processor Clock
1.Fetch Reset Vector
or
2.Service Interrupt
a.Stack
b.Set I-Bit
c.Vector to Interrupt Routine
Figure 6-2: WAIT Flowcharts
SECTION 6: OPERATING MODES
Page 32
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