欢迎访问ic37.com |
会员登录 免费注册
发布采购

68HC05P4A_1 参数 Datasheet PDF下载

68HC05P4A_1图片预览
型号: 68HC05P4A_1
PDF下载: 下载PDF文件 查看货源
内容描述: 规格(通用版) [SPECIFICATION (General Release)]
分类和应用:
文件页数/大小: 83 页 / 2055 K
品牌: FREESCALE [ Freescale ]
 浏览型号68HC05P4A_1的Datasheet PDF文件第67页浏览型号68HC05P4A_1的Datasheet PDF文件第68页浏览型号68HC05P4A_1的Datasheet PDF文件第69页浏览型号68HC05P4A_1的Datasheet PDF文件第70页浏览型号68HC05P4A_1的Datasheet PDF文件第72页浏览型号68HC05P4A_1的Datasheet PDF文件第73页浏览型号68HC05P4A_1的Datasheet PDF文件第74页浏览型号68HC05P4A_1的Datasheet PDF文件第75页  
Freescale Semiconductor, Inc.  
GENERAL RELEASE SPECIFICATION  
12.3 DC Electrical Characteristics  
Table 12-1. DC Electrical Characteristics (V = 5 V)  
DD  
(V = 5.0 Vdc ± 10%, V = 0 Vdc, T = -40°C to +85°C, unless otherwise noted)  
DD  
SS  
A
Characteristic  
Symbol  
Min  
Typ  
Max  
Unit  
Output Voltage  
ILOAD = 10.0 µA  
ILOAD = -10.0 µA  
VOL  
VOH  
VDD-0.1  
0.1  
V
V
Output High Voltage  
(ILOAD = -0.8 mA) PA0-PA7, PB5-PB7, PC2-PC7, PD5  
(ILOAD = -5.0 mA) PC0-PC1  
VOH  
VOH  
VDD-0.8  
VDD-0.8  
V
V
Output Low Voltage  
(ILOAD = 1.6 mA) PA0-PA7, PB5-PB7, PC2-PC7, PD5  
(ILOAD = 15 mA) PC0-PC1  
VOL  
VOL  
0.4  
0.4  
V
V
Input High Voltage  
PA0-PA7, PB5-PB7, PC0-PC7, PD5, TCAP/PD7,  
IRQ, RESET, OSC1  
VIH  
VIL  
0.7 × VDD  
VDD  
V
V
Input Low Voltage  
PA0-PA7, PB5-PB7, PC0-PC7, PD5, TCAP/PD7,  
IRQ, RESET, OSC1  
VSS  
0.2 × VDD  
Supply Current  
Run  
Wait/Halt  
IDD  
IDD  
TBD  
TBD  
TBD  
TBD  
mA  
mA  
Stop  
25°C  
IDD  
IDD  
TBD  
TBD  
TBD  
µA  
µA  
0°C to +70°C (Standard)  
I/O Ports Hi-Z Leakage Current  
PA0-PA7, PB5-PB7, PC0-PC7, PD5  
IOZ  
IIN  
±10  
±1  
µA  
µA  
Input Current  
RESET, IRQ, OSC1, TCAP/PD7  
Capacitance  
Ports (as Input or Output)  
RESET, IRQ  
COUT  
CIN  
12  
8
pF  
pF  
NOTES:  
1. All values shown reflect average measurements.  
2. Typical values at midpoint of voltage range, 25°C.  
3. Wait IDD: Only timer system active.  
4. Run (Operating) IDD, Wait IDD: Measured using external square wave clock source (fosc= 4.2 MHz), all inputs 0.2 V from  
rail; no dc loads, less than 50 pF on all outputs, CL = 20 pF on OSC2.  
5. Wait, Stop IDD: All ports configured as inputs, VIL = 0.2 V, VIH = VDD -0.2 V.  
6. Wait IDD is affected linearly by the OSC2 capacitance.  
ELECTRICAL SPECIFICATIONS  
MC68HC05P4A  
Rev. 2.0  
12-2  
For More Information On This Product,  
Go to: www.freescale.com  
 复制成功!