Freescale Semiconductor, Inc.
GENERAL RELEASE SPECIFICATION
1.5.7 SDO/PB5, SDI/PB6, and SCK/PB7
Port B is a 3-bit bidirectional port. These pins are shared with the SIOP
subsystem. Refer to SECTION 7 SIMPLE SERIAL INPUT/OUTPUT PORT for a
detailed description of the SIOP. The address of the port B data register is $0001
and the data direction register is at address $0005. Reset does not affect the data
registers, but clears the data direction registers, thereby returning the ports to
inputs. Writing a one to a DDR bit sets the corresponding port bit to output mode.
1.5.8 PC0 through PC7
Port C is an 8-bit bidirectional port which does not share any of its pins with other
subsystems. The address of the port C data register is $0002 and the data
direction register is at address $0006. Reset does not affect the data registers, but
clears the data direction registers, thereby returning the ports to inputs. Writing a
one to a DDR bit sets the corresponding port bit to output mode. Two of the port C
pins, PC0 and PC1, have a higher current drive capability. See SECTION 12
ELECTRICAL SPECIFICATIONS.
1.5.9 PD5 and TCAP/PD7
Port D is a 2-bit port. PD5 is I/O and TCAP/PD7 is input-only shared with the timer
input capture. The address of the port D data register is $0003 and the data
direction register is at address $0007. Reset does not affect the data registers, but
clears the data direction registers, thereby returning the ports to inputs. Writing a
one to a DDR bit sets the corresponding port bit to output mode. The TCAP/PD7
pin controls the input capture feature for the on-chip programmable timer. This pin
can be read at any time even if the TCAP function is enabled.
1.6
Input/Output Programming
1-6
Rev. 2.0
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