Freescale Semiconductor, Inc.
GENERAL RELEASE SPECIFICATION
1.3
MCU Structure
Figure 1-1 shows the structure of the MC68HC05P4A.
OSC1 OSC2
INTERNAL
TCMP
OSCILLATOR
AND DIVIDE
PROCESSOR
CLOCK
COP
SYSTEM
TIMER
SYSTEM
BY
2
RESET
IRQ
TCAP/PD7
PORT
D REG
DATA
DIR REG
PORT
D I/O PD5
LINES
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PA0
PA1
ACCUMULATOR
DATA PORT
DIR REG C REG
CPU
CONTROL
PORT
C I/O
LINES
INDEX
REGISTER
PORT
A REG DIR REG
DATA
PA2
PORT
A I/O
LINES
PA3
PA4
PA5
PA6
PA7
CONDITION
CODE
REGISTER
CPU
STACK
POINTER
PROGRAM
COUNTER
HIGH
PORT
B I/O
SIOP
LINES
ALU
PROGRAM
COUNTER
LOW
SDO/PB5
PORTB DATA
REG DIR REG
SDI/PB6
SCK/PB7
Rev. 2.0
1-3
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