Freescale Semiconductor, Inc.
16-Bit Timer
Timer During Stop Mode
8.9 Tim e r During Stop Mod e
In stop mode, the timer stops counting and holds the last count value if
stop is exited by an interrupt. If reset is used, the counter is forced to
$FFFC. During stop, if the timer is on and at least one valid input capture
edge occurs at the TCAP pin, the input capture detect circuit is armed.
This does not set any timer flags or wake up the MCU. When the MCU
does wake up, however, there is an active input capture flag and data
from the first valid edge that occurred during the stop mode. If reset is
used to exit stop mode, no input capture flag or data remains, even if a
valid input capture edge occurred.
8.10 Tim e r Powe r Sup p ly Sourc e
The timer’s power is supplied by V and V . V
and V
will not
DD
SS
DD2
SS2
be needed since this module is not susceptible to supply noise.
MC68HC05CT4 — Rev. 2.0
General Release Specification
16-Bit Timer
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