Freescale Semiconductor, Inc.
Ge ne ra l De sc rip tion
NOTE: The voltage on the IRQ pin affects the mode of operation. See Section
6. Operating Modes.
1.4.4 OSC1 a nd OSC2
These pins provide control input for an on-chip clock oscillator circuit that
drives the PLL reference source. A crystal resonator, a ceramic
resonator, or an external signal connects to these pins providing a
system clock. The oscillator frequency is selectable between 5 or 40
times the internal bus rate. Typical oscillator configurations and
component values are shown in Figure 1-4. The manufacturer of the
crystal should be consulted, since actual component values are
dependent on the type of crystal used.
MCU
MCU
OSC1
OSC2
OSC1
OSC2
10 MΩ
UNCONNECTED
<
EXTERNAL CLOCK
10.24 MHz
15 pF
15 pF
(a) Crystal/Ceramic Resonator
Oscillator Connections
(b) External Clock Source
Connections
Figure 1-4. Oscillator Connections
1.4.5 Re se t (RESET)
This active-low pin is used to reset the MCU to a known startup state by
pulling RESET low. The RESET pin contains an internal Schmitt trigger
as part of its input to improve noise immunity. See Section 5. Resets.
General Release Specification
MC68HC05CT4 — Rev. 2.0
General Description
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