Freescale Semiconductor, Inc.
General Description
Signal Description
1.4 Sig na l De sc rip tion
The following paragraphs describe the signals.
1.4.1 V a nd V
DD
SS
Power is supplied to the microcontroller’s digital circuits using these two
pins. V is the positive supply and V is ground.
DD
SS
1.4.2 V
a nd V
SS2
DD2
Power is supplied to noise-susceptible circuitry such as the phase-
locked loop (PLL), comparators, and oscillators that require “cleaner”
supplies using these two pins. V
ground.
is the positive supply and V
is
SS2
DD2
1.4.3 Ma ska b le Inte rrup t Re q ue st (IRQ)
This pin has a mask option as specified by the user that provides one of
two different choices of interrupt triggering sensitivity. The options are:
1. Negative edge-sensitive triggering only
2. Both negative edge-sensitive and level-sensitive triggering
The microcontroller unit (MCU) completes the current instruction before
it responds to the interrupt request. When IRQ goes low for at least one
t
, a logic 1 is latched internally to signify that an interrupt has been
ILIH
requested. When the MCU completes its current instruction, the interrupt
latch is tested. If the interrupt latch contains a logic 1 and the interrupt
mask bit (I bit) in the condition code register is clear, the MCU then
begins the interrupt sequence.
If the option is selected to include level-sensitive triggering, the IRQ input
requires an external resistor to V for wire-OR operation.
DD
The IRQ pin contains an internal Schmitt trigger as part of its input to
improve noise immunity.
MC68HC05CT4 — Rev. 2.0
General Release Specification
General Description
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