Pinout
11.1 Signal Multiplexing and Pin Assignments
The following table shows the signals available on each pin and the locations of these
pins on the devices supported by this document. The SIM's GPS registers are responsible
for selecting which ALT functionality is available on most pins.
64
48
Pin Name
Default
ALT0
ALT1
ALT2
ALT3
LQFP LQFP
1
1
GPIOD2
GPIOD4
EXTAL
XTAL
2
2
RESETB
GPIOC0
GPIOC1
GPIOC2
GPIOF8
GPIOC3
GPIOC4
GPIOA7
GPIOA6
GPIOA5
GPIOA4
GPIOA0
GPIOA1
GPIOA2
GPIOA3
GPIOB7
GPIOC5
GPIOB6
GPIOB5
GPIOB4
VDDA
RESETB
GPIOC0
GPIOC1
GPIOC2
GPIOF8
GPIOC3
GPIOC4
GPIOA7
GPIOA6
GPIOA5
GPIOA4
GPIOA0
GPIOA1
GPIOA2
GPIOA3
GPIOB7
GPIOC5
GPIOB6
GPIOB5
GPIOB4
VDDA
3
3
CLKIN0
4
4
5
5
TXD0
RXD0
TA0
TB0
XB_IN2
CMPD_O
RXD0
CLKO0
CLKIN1
6
—
6
TB1
7
CMPA_O
CMPB_O
8
7
TA1
XB_IN8
EWM_OUT_B
9
—
—
—
8
ANA7&ANC11
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
ANA6&ANC10
ANA5&ANC9
ANA4&ANC8&CMPD_IN0
ANA0&CMPA_IN3
9
CMPC_O
XB_IN7
10
11
12
—
13
—
—
14
15
16
17
18
19
20
21
—
22
23
24
25
26
27
28
ANA1&CMPA_IN0
ANA2&VREFHA&CMPA_IN1
ANA3&VREFLA&CMPA_IN2
ANB7&ANC15&CMPB_IN2
DACO
ANB6&ANC14&CMPB_IN1
ANB5&ANC13&CMPC_IN2
ANB4&ANC12&CMPC_IN1
VSSA
VSSA
GPIOB0
GPIOB1
VCAP
GPIOB0
GPIOB1
VCAP
ANB0&CMPB_IN3
ANB1&CMPB_IN0
GPIOB2
GPIOB3
VDD
GPIOB2
GPIOB3
VDD
ANB2&VREFHB&CMPC_IN3
ANB3&VREFLB&CMPC_IN0
VSS
VSS
GPIOC6
GPIOC7
GPIOC8
GPIOC9
GPIOC10
GPIOF0
GPIOC6
GPIOC7
GPIOC8
GPIOC9
GPIOC10
GPIOF0
TA2
XB_IN3
TXD0
CMP_REF
XB_IN9
SS0_B
MISO0
SCK0
MOSI0
XB_IN6
RXD0
XB_IN4
XB_IN5
TB2
MISO0
SCK1
MC56F8455x Advance Information Data Sheet, Rev. 2, 06/2012.
62
Freescale Semiconductor, Inc.
Preliminary
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