Peripheral highlights
• Operation modes: edge count, gated count, signed count, capture, compare, PWM,
signal shot, single pulse, pulse string, cascaded, quadrature decode
• Programmable input filter
• Counting start can be synchronized across counters
1.6.7 Queued Serial Communications Interface (QSCI) Modules
• Operating clock up to two times CPU operating frequency
• Four-word-deep FIFOs available on both transmit and receive buffers
• Standard mark/space non-return-to-zero (NRZ) format
• 13-bit integer and 3-bit fractional baud rate selection
• Full-duplex or single-wire operation
• Programmable 8-bit or 9-bit data format
• Error detection capability
• Two receiver wakeup methods:
• Idle line
• Address mark
• 1/16 bit-time noise detection
1.6.8 Queued Serial Peripheral Interface (QSPI) Modules
• Maximum 25 Mbps baud rate
• Selectable baud rate clock sources for low baud rate communication
• Baud rate as low as Baudrate_Freq_in / 8192
• Full-duplex operation
• Master and slave modes
• Double-buffered operation with separate transmit and receive registers
• Four-word-deep FIFOs available on transmit and receive buffers
• Programmable length transmissions (2 bits to 16 bits)
• Programmable transmit and receive shift order (MSB as first bit transmitted)
1.6.9 Inter-Integrated Circuit (I2C)/System Management Bus (SMBus)
Modules
• Compatible with I2C bus standard
• Support for System Management Bus (SMBus) specification, version2
• Multi-master operation
• General call recognition
• 10-bit address extension
MC56F847xx Advance Information Data Sheet, Rev. 2, 06/2012.
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Freescale Semiconductor, Inc.
Preliminary
General Business Information
FREESCALE [ Freescale ]
