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56F84567VLL 参数 Datasheet PDF下载

56F84567VLL图片预览
型号: 56F84567VLL
PDF下载: 下载PDF文件 查看货源
内容描述: MC56F8458x进展 [MC56F8458x Advance]
分类和应用:
文件页数/大小: 68 页 / 1019 K
品牌: FREESCALE [ Freescale ]
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Design Considerations  
SDA  
tSU; DAT  
tf  
tr  
tBUF  
tf  
tr  
tHD; STA  
tSP  
tLOW  
SCL  
tSU; STA  
tHD; STA  
tSU; STO  
S
SR  
P
S
tHD; DAT  
tHIGH  
Figure 22. Timing Definition for Fast and Standard Mode Devices on the I2C Bus  
9 Design Considerations  
9.1 Thermal Design Considerations  
An estimation of the chip junction temperature, TJ, can be obtained from the equation:  
TJ = TA + (RΘJA x PD)  
Where,  
TA = Ambient temperature for the package (°C)  
RΘJA = Junction-to-ambient thermal resistance (°C/W)  
PD = Power dissipation in the package (W)  
The junction-to-ambient thermal resistance is an industry-standard value that provides a  
quick and easy estimation of thermal performance. Unfortunately, there are two values in  
common usage: the value determined on a single-layer board and the value obtained on a  
board with two planes. For packages such as the PBGA, these values can be different by  
a factor of two. Which value is closer to the application depends on the power dissipated  
by other components on the board. The value obtained on a single layer board is  
appropriate for the tightly packed printed circuit board. The value obtained on the board  
with the internal planes is usually appropriate if the board has low-power dissipation and  
the components are well separated.  
When a heat sink is used, the thermal resistance is expressed as the sum of a junction-to-  
case thermal resistance and a case-to-ambient thermal resistance:  
RΘJA = RΘJC + RΘCA  
Where,  
RΘJA = Package junction-to-ambient thermal resistance (°C/W)  
MC56F8458x Advance Information Data Sheet, Rev. 2, 06/2012.  
58  
Freescale Semiconductor, Inc.  
Preliminary  
General Business Information  
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