Crystal Oscillator Timing
10.7 Crystal Oscillator Timing
Table 10-15 Crystal Oscillator Parameters
Characteristic
Crystal Start-up time
Symbol
TCS
Min
4
Typ
5
Max
10
Unit
ms
ms
ohms
ps
Resonator Start-up time
TRS
0.1
—
0.18
—
1
Crystal ESR
RESR
TD
120
250
1.5
300
300
290
110
1
Crystal Peak-to-Peak Jitter
Crystal Min-Max Period Variation
Resonator Peak-to-Peak Jitter
Resonator Min-Max Period Variation
Bias Current, high-drive mode
Bias Current, low-drive mode
Quiescent Current, power-down mode
70
0.12
—
—
TPV
—
ns
TRJ
—
ps
TRP
—
—
ps
IBIASH
IBIASL
IPD
—
250
80
0
μA
—
μA
—
μA
10.8 External Memory Interface Timing
The External Memory Interface is designed to access static memory and peripheral devices. Figure 10-4
shows sample timing and parameters that are detailed in Table 10-16.
The timing of each parameter consists of both a fixed delay portion and a clock related portion, as well as
user controlled wait states. The equation:
t = D + P * (M + W)
should be used to determine the actual time of each parameter. The terms in this equation are defined as:
t
= Parameter delay time
D
P
= Fixed portion of the delay, due to on-chip path delays
= Period of the system clock, which determines the execution rate of the part
(i.e., when the device is operating at 60MHz, P = 16.67 ns)
M
W
= Fixed portion of a clock period inherent in the design; this number is adjusted to account
for possible derating of clock duty cycle
= Sum of the applicable wait state controls. The “Wait State Controls” column of
Table 10-16 shows the applicable controls for each parameter and the EMI chapter of the
56F8300 Peripheral User Manual details what each wait state field controls.
When using the XTAL clock input directly as the chip clock without prescaling (ZSRC selects prescaler
clock and prescaler is set to 1), the EMI quadrature clock is generated using both edges of the EXTAL
÷
clock input. In this situation only, parameter values must be adjusted for the duty cycle at XTAL. DCAOE
and DCAEO are used to make this duty cycle adjustment where needed.
56F8366 Technical Data, Rev. 6
Freescale Semiconductor
Preliminary
153